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authorPeter Tyser <ptyser@xes-inc.com>2009-05-22 10:26:36 -0500
committerKumar Gala <galak@kernel.crashing.org>2009-06-12 17:23:45 -0500
commit25623937bb81cae788d767e6c59a11c96fc82866 (patch)
treee093987fa68c87ffcd1b1e6e2c24dbfaae03573c /board/xes
parentbef3013908bbc68f24084174a3ca86cc2a3eb986 (diff)
xes: Update Freescale DDR code to work with 86xx processors
Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/xes')
-rw-r--r--board/xes/common/Makefile2
-rw-r--r--board/xes/common/fsl_8xxx_ddr.c (renamed from board/xes/common/fsl_85xx_ddr.c)8
2 files changed, 8 insertions, 2 deletions
diff --git a/board/xes/common/Makefile b/board/xes/common/Makefile
index 87b8a02d29..6aef6f4a1f 100644
--- a/board/xes/common/Makefile
+++ b/board/xes/common/Makefile
@@ -31,7 +31,7 @@ LIB = $(obj)lib$(VENDOR).a
COBJS-$(CONFIG_FSL_PCI_INIT) += fsl_8xxx_pci.o
COBJS-$(CONFIG_MPC8572) += fsl_8572_clk.o
-COBJS-$(CONFIG_MPC85xx) += fsl_85xx_ddr.o
+COBJS-$(CONFIG_FSL_DDR2) += fsl_8xxx_ddr.o
COBJS-$(CONFIG_NAND_ACTL) += actl_nand.o
SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
diff --git a/board/xes/common/fsl_85xx_ddr.c b/board/xes/common/fsl_8xxx_ddr.c
index 30b4767019..ec64efaba2 100644
--- a/board/xes/common/fsl_85xx_ddr.c
+++ b/board/xes/common/fsl_8xxx_ddr.c
@@ -32,9 +32,10 @@ phys_size_t initdram(int board_type)
{
phys_size_t dram_size = fsl_ddr_sdram();
+#ifdef CONFIG_MPC85xx
dram_size = setup_ddr_tlbs(dram_size / 0x100000);
-
dram_size *= 0x100000;
+#endif
#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
/* Initialize and enable DDR ECC */
@@ -48,7 +49,12 @@ phys_size_t initdram(int board_type)
void board_add_ram_info(int use_default)
{
#if (CONFIG_NUM_DDR_CONTROLLERS > 1)
+#if defined(CONFIG_MPC85xx)
volatile ccsr_ddr_t *ddr1 = (void *)(CONFIG_SYS_MPC85xx_DDR_ADDR);
+#elif defined(CONFIG_MPC86xx)
+ volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
+ volatile ccsr_ddr_t *ddr1 = &immap->im_ddr1;
+#endif
#endif
puts(" (");