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| author | Andy Fleming <afleming@freescale.com> | 2008-09-09 16:16:20 -0500 |
|---|---|---|
| committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | 2008-09-09 16:16:20 -0500 |
| commit | 650a9e7abc44ce1ce73d6668eaf0ba2d6b8025e9 (patch) | |
| tree | 30732e12d39390eda22338e98db7b8ab9025bf22 /board/xilinx/ml507/xparameters.h | |
| parent | 6cc64f9b5f69239c8b1969572b5a3a4aab7de5b9 (diff) | |
| parent | 3b20fd83c73c22acfcb0c6663be747bd5c8b7011 (diff) | |
Merge branch 'denx'
Diffstat (limited to 'board/xilinx/ml507/xparameters.h')
| -rw-r--r-- | board/xilinx/ml507/xparameters.h | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/board/xilinx/ml507/xparameters.h b/board/xilinx/ml507/xparameters.h index 77d2ddf9bd..1992fff220 100644 --- a/board/xilinx/ml507/xparameters.h +++ b/board/xilinx/ml507/xparameters.h @@ -21,15 +21,14 @@ #ifndef XPARAMETER_H #define XPARAMETER_H -#define XPAR_DDR2_SDRAM_MEM_BASEADDR 0x00000000 -#define XPAR_IIC_EEPROM_BASEADDR 0x81600000 -#define XPAR_INTC_0_BASEADDR 0x81800000 -#define XPAR_LLTEMAC_0_BASEADDR 0x81C00000 -#define XPAR_UARTLITE_0_BASEADDR 0x84000000 -#define XPAR_FLASH_MEM0_BASEADDR 0xFE000000 -#define XPAR_PLB_CLOCK_FREQ_HZ 100000000 -#define XPAR_CORE_CLOCK_FREQ_HZ 400000000 -#define XPAR_INTC_MAX_NUM_INTR_INPUTS 13 +#define XPAR_DDR2_SDRAM_MEM_BASEADDR 0x00000000 +#define XPAR_IIC_EEPROM_BASEADDR 0x81600000 +#define XPAR_INTC_0_BASEADDR 0x81800000 +#define XPAR_UARTLITE_0_BASEADDR 0x84000000 +#define XPAR_FLASH_MEM0_BASEADDR 0xFE000000 +#define XPAR_PLB_CLOCK_FREQ_HZ 100000000 +#define XPAR_CORE_CLOCK_FREQ_HZ 400000000 +#define XPAR_INTC_MAX_NUM_INTR_INPUTS 13 #define XPAR_UARTLITE_0_BAUDRATE 9600 #endif |