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authorSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>2017-11-23 12:23:12 +0530
committerMichal Simek <michal.simek@xilinx.com>2017-11-29 08:02:40 +0100
commita04a5daae25a74ad2ac90b66667dac126242baa0 (patch)
tree5c635a5a8e65f554d1678c45884e4cae25192810 /board/xilinx/zynq/zynq-cse-qspi-single
parentdd12a27ce28131cd1b80ff865d3297ffec4cc4a6 (diff)
net: xilinx_axi_emac: Use readl and writel for io ops
This patch uses readl and writel instead of in_be32 and out_be32 for io ops as these internally uses readl, writel for microblaze and for Zynq, ZynqMP there is no need of endianness conversion and readl, writel should work straightaway. This patch starts supporting the driver for Zynq and ZynqMP platforms. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'board/xilinx/zynq/zynq-cse-qspi-single')
0 files changed, 0 insertions, 0 deletions