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author | Jagan Teki <jagan@amarulasolutions.com> | 2019-07-15 23:58:52 +0530 |
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committer | Kever Yang <kever.yang@rock-chips.com> | 2019-07-19 11:11:10 +0800 |
commit | 4b09719c38cea3d10095675046eb6e8e84955e85 (patch) | |
tree | 4c4ae0e81862e2fe4d635b345e3e6b1d69822837 /board/zyxel | |
parent | cb13534abe07afae88bdeadf24e42717a9657750 (diff) |
ram: rk3399: Compute stride for 2 channels
stride value from sdram timings can be computed dynamically
based on the determined capacity for the given channel.
Right now these stride values are taken as part of sdram timings
via dtsi, but it possible to use same timings dtsi for given
frequency even though the configured board sdram do support
single channel with different size by dynamically detect the
stride value.
Example, NanoPi NEO4 do have DDR3-1866, but with single channel
and 1GB size with dynamic stride detection it is possible to
use existing rk3399-sdram-ddr3-1866.dtsi whose stride,
number of channels and capacity it support is d efferent.
So, add initial support to calculate the stride value for
2 channels sdram, which is available by default on existing
boards.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Diffstat (limited to 'board/zyxel')
0 files changed, 0 insertions, 0 deletions