Merge tag '2020-01-20-ti-2020.04' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti

K3 J721E:
* DMA support.
* MMC and ADMA support.
* EEPROM support.
* J721e High Security EVM support.
* USB DT nodes

K3 AM654:
* Fixed boot due to pmic probe error.
* USB support and DT nodes.
* ADMA support

DRA7xx/AM57xx:
* BBAI board support
* Clean up of net platform code under board/ti

AM33/AM43/Davinci:
* Reduce SPL size for omap3 boards.
* SPL DT support for da850-lcdk
* PLL divider fix for AM335x

9 files changed, 718 insertions, 215 deletions

diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c
index 36f86926bc..21fc5ed1d3 100644
--- a/board/ti/am43xx/board.c
+++ b/board/ti/am43xx/board.c
@@ -9,6 +9,7 @@
 
 #include <common.h>
 #include <eeprom.h>
+#include <dm/uclass.h>
 #include <env.h>
 #include <fdt_support.h>
 #include <i2c.h>
@@ -29,8 +30,6 @@
 #include <power/pmic.h>
 #include <power/tps65218.h>
 #include <power/tps62362.h>
-#include <miiphy.h>
-#include <cpsw.h>
 #include <linux/usb/gadget.h>
 #include <dwc3-uboot.h>
 #include <dwc3-omap-uboot.h>
@@ -854,109 +853,6 @@ int board_usb_cleanup(int index, enum usb_init_type init)
 #endif /* defined(CONFIG_USB_DWC3) || defined(CONFIG_USB_XHCI_OMAP) */
 #endif /* !CONFIG_IS_ENABLED(DM_USB_GADGET) */
 
-#ifdef CONFIG_DRIVER_TI_CPSW
-
-static void cpsw_control(int enabled)
-{
-	/* Additional controls can be added here */
-	return;
-}
-
-static struct cpsw_slave_data cpsw_slaves[] = {
-	{
-		.slave_reg_ofs	= 0x208,
-		.sliver_reg_ofs	= 0xd80,
-		.phy_addr	= 16,
-	},
-	{
-		.slave_reg_ofs	= 0x308,
-		.sliver_reg_ofs	= 0xdc0,
-		.phy_addr	= 1,
-	},
-};
-
-static struct cpsw_platform_data cpsw_data = {
-	.mdio_base		= CPSW_MDIO_BASE,
-	.cpsw_base		= CPSW_BASE,
-	.mdio_div		= 0xff,
-	.channels		= 8,
-	.cpdma_reg_ofs		= 0x800,
-	.slaves			= 1,
-	.slave_data		= cpsw_slaves,
-	.ale_reg_ofs		= 0xd00,
-	.ale_entries		= 1024,
-	.host_port_reg_ofs	= 0x108,
-	.hw_stats_reg_ofs	= 0x900,
-	.bd_ram_ofs		= 0x2000,
-	.mac_control		= (1 << 5),
-	.control		= cpsw_control,
-	.host_port_num		= 0,
-	.version		= CPSW_CTRL_VERSION_2,
-};
-
-int board_eth_init(bd_t *bis)
-{
-	int rv;
-	uint8_t mac_addr[6];
-	uint32_t mac_hi, mac_lo;
-
-	/* try reading mac address from efuse */
-	mac_lo = readl(&cdev->macid0l);
-	mac_hi = readl(&cdev->macid0h);
-	mac_addr[0] = mac_hi & 0xFF;
-	mac_addr[1] = (mac_hi & 0xFF00) >> 8;
-	mac_addr[2] = (mac_hi & 0xFF0000) >> 16;
-	mac_addr[3] = (mac_hi & 0xFF000000) >> 24;
-	mac_addr[4] = mac_lo & 0xFF;
-	mac_addr[5] = (mac_lo & 0xFF00) >> 8;
-
-	if (!env_get("ethaddr")) {
-		puts("<ethaddr> not set. Validating first E-fuse MAC\n");
-		if (is_valid_ethaddr(mac_addr))
-			eth_env_set_enetaddr("ethaddr", mac_addr);
-	}
-
-	mac_lo = readl(&cdev->macid1l);
-	mac_hi = readl(&cdev->macid1h);
-	mac_addr[0] = mac_hi & 0xFF;
-	mac_addr[1] = (mac_hi & 0xFF00) >> 8;
-	mac_addr[2] = (mac_hi & 0xFF0000) >> 16;
-	mac_addr[3] = (mac_hi & 0xFF000000) >> 24;
-	mac_addr[4] = mac_lo & 0xFF;
-	mac_addr[5] = (mac_lo & 0xFF00) >> 8;
-
-	if (!env_get("eth1addr")) {
-		if (is_valid_ethaddr(mac_addr))
-			eth_env_set_enetaddr("eth1addr", mac_addr);
-	}
-
-	if (board_is_eposevm()) {
-		writel(RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE, &cdev->miisel);
-		cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RMII;
-		cpsw_slaves[0].phy_addr = 16;
-	} else if (board_is_sk()) {
-		writel(RGMII_MODE_ENABLE, &cdev->miisel);
-		cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RGMII;
-		cpsw_slaves[0].phy_addr = 4;
-		cpsw_slaves[1].phy_addr = 5;
-	} else if (board_is_idk()) {
-		writel(RGMII_MODE_ENABLE, &cdev->miisel);
-		cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RGMII;
-		cpsw_slaves[0].phy_addr = 0;
-	} else {
-		writel(RGMII_MODE_ENABLE, &cdev->miisel);
-		cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RGMII;
-		cpsw_slaves[0].phy_addr = 0;
-	}
-
-	rv = cpsw_register(&cpsw_data);
-	if (rv < 0)
-		printf("Error %d registering CPSW switch\n", rv);
-
-	return rv;
-}
-#endif
-
 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
 int ft_board_setup(void *blob, bd_t *bd)
 {
diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c
index c57473c802..d70ab0c4d0 100644
--- a/board/ti/am57xx/board.c
+++ b/board/ti/am57xx/board.c
@@ -15,6 +15,7 @@
 #include <sata.h>
 #include <serial.h>
 #include <usb.h>
+#include <errno.h>
 #include <asm/omap_common.h>
 #include <asm/omap_sec_common.h>
 #include <asm/emif.h>
@@ -38,6 +39,10 @@
 #include "../common/board_detect.h"
 #include "mux_data.h"
 
+#ifdef CONFIG_SUPPORT_EMMC_BOOT
+static int board_bootmode_has_emmc(void);
+#endif
+
 #define board_is_x15()		board_ti_is("BBRDX15_")
 #define board_is_x15_revb1()	(board_ti_is("BBRDX15_") && \
 				 !strncmp("B.10", board_ti_get_rev(), 3))
@@ -50,6 +55,7 @@
 #define board_is_am574x_idk()	board_ti_is("AM574IDK")
 #define board_is_am572x_idk()	board_ti_is("AM572IDK")
 #define board_is_am571x_idk()	board_ti_is("AM571IDK")
+#define board_is_bbai()		board_ti_is("BBONE-AI")
 
 #ifdef CONFIG_DRIVER_TI_CPSW
 #include <cpsw.h>
@@ -99,12 +105,19 @@ static const struct dmm_lisa_map_regs am574x_idk_lisa_regs = {
 	.is_ma_present  = 0x1
 };
 
+static const struct dmm_lisa_map_regs bbai_lisa_regs = {
+	.dmm_lisa_map_3 = 0x80640100,
+	.is_ma_present  = 0x1
+};
+
 void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs)
 {
 	if (board_is_am571x_idk())
 		*dmm_lisa_regs = &am571x_idk_lisa_regs;
 	else if (board_is_am574x_idk())
 		*dmm_lisa_regs = &am574x_idk_lisa_regs;
+	else if (board_is_bbai())
+		*dmm_lisa_regs = &bbai_lisa_regs;
 	else
 		*dmm_lisa_regs = &beagle_x15_lisa_regs;
 }
@@ -508,6 +521,14 @@ void do_board_detect(void)
 				  CONFIG_EEPROM_CHIP_ADDRESS);
 	if (rc)
 		printf("ti_i2c_eeprom_init failed %d\n", rc);
+
+#ifdef CONFIG_SUPPORT_EMMC_BOOT
+	rc = board_bootmode_has_emmc();
+	if (!rc)
+		rc = ti_emmc_boardid_get();
+	if (rc)
+		printf("ti_emmc_boardid_get failed %d\n", rc);
+#endif
 }
 
 #else	/* CONFIG_SPL_BUILD */
@@ -523,6 +544,14 @@ void do_board_detect(void)
 	if (rc)
 		printf("ti_i2c_eeprom_init failed %d\n", rc);
 
+#ifdef CONFIG_SUPPORT_EMMC_BOOT
+	rc = board_bootmode_has_emmc();
+	if (!rc)
+		rc = ti_emmc_boardid_get();
+	if (rc)
+		printf("ti_emmc_boardid_get failed %d\n", rc);
+#endif
+
 	if (board_is_x15())
 		bname = "BeagleBoard X15";
 	else if (board_is_am572x_evm())
@@ -533,6 +562,8 @@ void do_board_detect(void)
 		bname = "AM572x IDK";
 	else if (board_is_am571x_idk())
 		bname = "AM571x IDK";
+	else if (board_is_bbai())
+		bname = "BeagleBone AI";
 
 	if (bname)
 		snprintf(sysinfo.board_string, SYSINFO_BOARD_NAME_MAX_LEN,
@@ -567,6 +598,8 @@ static void setup_board_eeprom_env(void)
 		name = "am572x_idk";
 	} else if (board_is_am571x_idk()) {
 		name = "am571x_idk";
+	} else if (board_is_bbai()) {
+		name = "am5729_beagleboneai";
 	} else {
 		printf("Unidentified board claims %s in eeprom header\n",
 		       board_ti_get_name());
@@ -630,7 +663,7 @@ void am57x_idk_lcd_detect(void)
 	struct udevice *dev;
 
 	/* Only valid for IDKs */
-	if (board_is_x15() || board_is_am572x_evm())
+	if (board_is_x15() || board_is_am572x_evm() ||  board_is_bbai())
 		return;
 
 	/* Only AM571x IDK has gpio control detect.. so check that */
@@ -728,6 +761,9 @@ int board_late_init(void)
 	/* Just probe the potentially supported cdce913 device */
 	uclass_get_device(UCLASS_CLK, 0, &dev);
 
+	if (board_is_bbai())
+		env_set("console", "ttyS0,115200n8");
+
 #if !defined(CONFIG_SPL_BUILD)
 	board_ti_set_ethaddr(2);
 #endif
@@ -745,6 +781,11 @@ void set_muxconf_regs(void)
 {
 	do_set_mux32((*ctrl)->control_padconf_core_base,
 		     early_padconf, ARRAY_SIZE(early_padconf));
+
+#ifdef CONFIG_SUPPORT_EMMC_BOOT
+	do_set_mux32((*ctrl)->control_padconf_core_base,
+		     emmc_padconf, ARRAY_SIZE(emmc_padconf));
+#endif
 }
 
 #ifdef CONFIG_IODELAY_RECALIBRATION
@@ -770,6 +811,11 @@ void recalibrate_iodelay(void)
 		pconf_sz = ARRAY_SIZE(core_padconf_array_essential_am571x_idk);
 		iod = iodelay_cfg_array_am571x_idk;
 		iod_sz = ARRAY_SIZE(iodelay_cfg_array_am571x_idk);
+	} else if (board_is_bbai()) {
+		pconf = core_padconf_array_essential_bbai;
+		pconf_sz = ARRAY_SIZE(core_padconf_array_essential_bbai);
+		iod = iodelay_cfg_array_bbai;
+		iod_sz = ARRAY_SIZE(iodelay_cfg_array_bbai);
 	} else {
 		/* Common for X15/GPEVM */
 		pconf = core_padconf_array_essential_x15;
@@ -1098,6 +1144,8 @@ int board_fit_config_name_match(const char *name)
 		return 0;
 	} else if (board_is_am571x_idk() && !strcmp(name, "am571x-idk")) {
 		return 0;
+	} else if (board_is_bbai() && !strcmp(name, "am5729-beagleboneai")) {
+		return 0;
 	}
 
 	return -1;
@@ -1114,6 +1162,17 @@ int fastboot_set_reboot_flag(void)
 }
 #endif
 
+#ifdef CONFIG_SUPPORT_EMMC_BOOT
+static int board_bootmode_has_emmc(void)
+{
+	/* Check that boot mode is same as BBAI */
+	if (gd->arch.omap_boot_mode != 2)
+		return -EIO;
+
+	return 0;
+}
+#endif
+
 #ifdef CONFIG_TI_SECURE_DEVICE
 void board_fit_image_post_process(void **p_image, size_t *p_size)
 {
diff --git a/board/ti/am57xx/mux_data.h b/board/ti/am57xx/mux_data.h
index d4a15ae93d..212799c93d 100644
--- a/board/ti/am57xx/mux_data.h
+++ b/board/ti/am57xx/mux_data.h
@@ -233,6 +233,203 @@ const struct pad_conf_entry core_padconf_array_essential_x15[] = {
 	{RSTOUTN, (M0 | PIN_OUTPUT)},	/* rstoutn.rstoutn */
 };
 
+const struct pad_conf_entry core_padconf_array_essential_bbai[] = {
+	/* Cape Bus i2c */
+	/* NOTE: For the i2cj_scl and i2ci_scl signals to work properly, the INPUTENABLE bit of the
+	 * appropriate CTRL_CORE_PAD_x registers should be set to 0x1 because of retiming
+	 * purposes.
+	 */
+	{GPMC_A0, (M7 | PIN_INPUT_PULLUP)},		     /* P9_19A: R6_GPIO7_3: gpmc_a0.i2c4_scl (Shared with F4_UART10_RTSN) */
+	{GPMC_A1, (M7 | PIN_INPUT_PULLUP)},		     /* P9_20A: T9_GPIO7_4: gpmc_a1.i2c4_sda (Shared with D2_UART10_CTSN) */
+
+	/* Bluetooth UART */
+	{GPMC_A4, (M8 | PIN_INPUT)},			    /* P6 UART6_RXD: gpmc_a4.uart6_rxd */
+	{GPMC_A5, (M8 | PIN_OUTPUT)},			   /* R9 UART6_TXD: gpmc_a5.uart6_txd */
+	{GPMC_A6, (M8 | PIN_INPUT)},			    /* R5 UART6_CTSN: gpmc_a6.uart6_ctsn */
+	{GPMC_A7, (M8 | PIN_OUTPUT)},			   /* P5 UART6_RTSN: gpmc_a7.uart6_rtsn */
+
+	/* eMMC */
+	{GPMC_A19, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)},      /*  K7: gpmc_a19.mmc2_dat4 */
+	{GPMC_A20, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)},      /*  M7: gpmc_a20.mmc2_dat5 */
+	{GPMC_A21, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)},      /*  J5: gpmc_a21.mmc2_dat6 */
+	{GPMC_A22, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)},      /*  K6: gpmc_a22.mmc2_dat7 */
+	{GPMC_A23, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)},      /*  J7: gpmc_a23.mmc2_clk */
+	{GPMC_A24, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)},      /*  J4: gpmc_a24.mmc2_dat0 */
+	{GPMC_A25, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)},      /*  J6: gpmc_a25.mmc2_dat1 */
+	{GPMC_A26, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)},      /*  H4: gpmc_a26.mmc2_dat2 */
+	{GPMC_A27, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)},      /*  H5: gpmc_a27.mmc2_dat3 */
+	{GPMC_CS1, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)},      /*  H6: gpmc_cs1.mmc2_cmd */
+
+	{GPMC_ADVN_ALE, (M14 | PIN_INPUT_PULLUP)},	      /* N1 RGMII_RST: gpmc_advn_ale.gpio2_23 */
+
+	{VIN1A_CLK0, (M14 | PIN_INPUT_PULLUP)},		 /* AG8 INT_ADC: vin1a_clk0.gpio2_30 */
+	{VIN1A_DE0, (M10 | PIN_INPUT_PULLDOWN)},		/* P8_35B: AD9_EQEP1A_IN: vin1a_de0.eQEP1A_in */
+	{VIN1A_FLD0, (M10 | PIN_INPUT_PULLDOWN)},	       /* P8_33B: AF9_EQEP1B_IN: vin1a_fld0.eQEP1B_in */
+	{VIN1A_VSYNC0, (M14 | PIN_INPUT_PULLDOWN)},	     /* P9_21A: AF8_TIMER13: vin1a_vsync0.gpio3_3 */
+
+	{VIN1A_D3, (M14 | PIN_INPUT_PULLDOWN)},		 /* AH6 USR4: vin1a_d3.gpio3_7 */
+
+	{VIN1A_D6, (M10 | PIN_INPUT_PULLDOWN)},		 /* P8_12: AG6: vin1a_d6.eQEP2A_in */
+	{VIN1A_D7, (M10 | PIN_INPUT_PULLDOWN)},		 /* P8_11: AH4: vin1a_d7.eQEP2B_in */
+	{VIN1A_D8, (M14 | PIN_INPUT_PULLDOWN)},		 /* P9_15: AG4: vin1a_d8.gpio3_12 */
+	{VIN1A_D9, (M14 | PIN_INPUT)},			  /* AG2 USB ID: vin1a_d9.gpio3_13 */
+	{VIN1A_D10, (M14 | PIN_INPUT_PULLDOWN)},		/* AG3 USR3: vin1a_d10.gpio3_14 */
+	{VIN1A_D11, (M14 | PIN_INPUT_PULLDOWN)},		/* AG5 USR2: vin1a_d11.gpio3_15 */
+	{VIN1A_D13, (M14 | PIN_OUTPUT_PULLDOWN)},	       /* AF6 USR0: vin1a_d13.gpio3_17 */
+	{VIN1A_D14, (M14 | PIN_INPUT_PULLDOWN)},		/* AF3 WL_REG_ON: vin1a_d14.gpio3_18 */
+	{VIN1A_D16, (M14 | PIN_INPUT_PULLDOWN)},		/* AF1 BT_HOST_WAKE: vin1a_d16.gpio3_20 */
+	{VIN1A_D17, (M14 | PIN_OUTPUT_PULLDOWN)},	       /* AE3 BT_WAKE: vin1a_d17.gpio3_21 */
+	{VIN1A_D18, (M14 | PIN_OUTPUT_PULLUP)},		 /* AE5 BT_REG_ON: vin1a_d18.gpio3_22 */
+	{VIN1A_D19, (M14 | PIN_INPUT_PULLDOWN)},		/* AE1 WL_HOST_WAKE: vin1a_d19.gpio3_23 */
+	{VIN1A_D20, (M14 | PIN_INPUT_PULLDOWN)},		/* P9_26B: AE2: vin1a_d20.gpio3_24 */
+	{VIN1A_D23, (M14 | PIN_OUTPUT_PULLDOWN)},	       /* AD3 VDD_ADC_SEL: vin1a_d23.gpio3_27 */
+
+	{VIN2A_D2, (M14 | PIN_INPUT_PULLDOWN)},		 /* P8_15A: D1: vin2a_d2.gpio4_3 */
+
+	/* Cape Bus i2c (gpio shared) */
+	{VIN2A_D4, (M14 | PIN_INPUT)},			  /* P9_20B: D2_UART10_CTSN: vin2a_d4. (Shared with T9_GPIO7_4) */
+	{VIN2A_D5, (M14 | PIN_INPUT)},			  /* P9_19B: F4_UART10_RTSN: vin2a_d5. (Shared with R6_GPIO7_3) */
+
+	{VIN2A_D8, (M14 | PIN_INPUT_PULLDOWN)},		 /* P8_18: F5_GPIO4_9: vin2a_d8.gpio4_9 */
+	{VIN2A_D9, (M14 | PIN_INPUT_PULLDOWN)},		 /* P8_19: E6_EHRPWM2A: vin2a_d9.gpio4_10 */
+	{VIN2A_D10, (M14 | PIN_INPUT_PULLDOWN)},		/* P8_13: D3_EHRPWM2B: vin2a_d10.gpio4_11 */
+	{VIN2A_D12, (M14 | PIN_INPUT_PULLDOWN)},		/* P8_14: D5_GPIO4_13: vin2a_d12.gpio4_13 */
+	{VIN2A_D13, (M10 | PIN_INPUT_PULLDOWN)},		/* P9_42B: C2_GPIO4_14: vin2a_d13.eQEP3A_in */
+	{VIN2A_D14, (M10 | PIN_INPUT_PULLDOWN)},		/* P9_27A: C3_GPIO4_15: vin2a_d14.eQEP3B_in */
+	{VIN2A_D17, (M14 | PIN_INPUT_PULLDOWN)},		/* P9_14: D6_EHRPWM3A: vin2a_d17.gpio4_25 */
+	{VIN2A_D18, (M14 | PIN_INPUT_PULLDOWN)},		/* P9_16: C5_EHRPWM3B: vin2a_d18.gpio4_26 */
+	{VIN2A_D19, (M12 | PIN_INPUT | MANUAL_MODE)},	   /* P8_15B: A3_GPIO4_27: vin2a_d19.pr1_pru1_gpi16 */
+	{VIN2A_D20, (M14 | PIN_INPUT_PULLDOWN)},		/* P8_26: B3_GPIO4_28: vin2a_d20.gpio4_28 */
+	{VIN2A_D21, (M12 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},  /* P8_16: B4_GPIO4_29: vin2a_d21.pr1_pru1_gpi18 */
+	{VOUT1_CLK, (M14 | PIN_INPUT_PULLDOWN)},		/* P8_28A: D11_VOUT1_CLK: vout1_clk.gpio4_19 */
+	{VOUT1_DE, (M14 | PIN_INPUT_PULLDOWN)},		 /* P8_30A: B10_VOUT1_DE: vout1_de.gpio4_20 */
+	{VOUT1_HSYNC, (M14 | PIN_INPUT_PULLDOWN)},	      /* P8_29A: C11_VOUT1_HSYNC: vout1_hsync.gpio4_22 */
+	{VOUT1_VSYNC, (M14 | PIN_INPUT_PULLDOWN)},	      /* P8_27A: E11_VOUT1_VSYNC: vout1_vsync.gpio4_23 */
+	{VOUT1_D0, (M14 | PIN_INPUT_PULLDOWN)},		 /* P8_45A: F11_VOUT1_D0: vout1_d0.gpio8_0 */
+	{VOUT1_D1, (M14 | PIN_INPUT_PULLDOWN)},		 /* P8_46A: G10_VOUT1_D1: vout1_d1.gpio8_1 */
+	{VOUT1_D2, (M14 | PIN_INPUT_PULLDOWN)},		 /* P8_43: F10_LCD_DATA2: vout1_d2.gpio8_2 */
+	{VOUT1_D3, (M14 | PIN_INPUT_PULLDOWN)},		 /* P8_44: G11_LCD_DATA3: vout1_d3.gpio8_3 */
+	{VOUT1_D4, (M12 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},   /* P8_41: E9_LCD_DATA4: vout1_d4.pr2_pru0_gpi1 */
+	{VOUT1_D5, (M12 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},   /* P8_42: F9_LCD_DATA5: vout1_d5.pr2_pru0_gpi2 */
+	{VOUT1_D6, (M12 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},   /* P8_39: F8_LCD_DATA6: vout1_d6.pr2_pru0_gpi3 */
+	{VOUT1_D7, (M12 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},   /* P8_40: E7_LCD_DATA7: vout1_d7.pr2_pru0_gpi4 */
+	{VOUT1_D8, (M14 | PIN_INPUT_PULLDOWN)},		 /* P8_37A: E8_VOUT1_D8: vout1_d8.gpio8_8 */
+	{VOUT1_D9, (M14 | PIN_INPUT_PULLDOWN)},		 /* P8_38A: D9_VOUT1_D9: vout1_d9.gpio8_9 */
+	{VOUT1_D10, (M14 | PIN_INPUT)},			 /* P8_36A: D7_VOUT1_D10: vout1_d10.gpio8_10 */
+	{VOUT1_D11, (M14 | PIN_INPUT_PULLDOWN)},		/* P8_34A: D8_VOUT1_D11: vout1_d11.gpio8_11 */
+	{VOUT1_D14, (M14 | PIN_INPUT_PULLDOWN)},		/* P8_31A: C8_VOUT1_D14: vout1_d14.gpio8_14 */
+	{VOUT1_D15, (M14 | PIN_INPUT_PULLDOWN)},		/* P8_32A: C7_VOUT1_D15: vout1_d15.gpio8_15 */
+	{VOUT1_D17, (M14 | PIN_INPUT_PULLDOWN)},		/* P9_11B: B8_GPIO8_17: vout1_d17.gpio8_17 */
+	{VOUT1_D18, (M14 | PIN_INPUT_PULLDOWN)},		/* P8_17: A7_GPIO8_18: vout1_d18.gpio8_18 */
+	{VOUT1_D19, (M12 | PIN_INPUT | MANUAL_MODE)},	   /* P8_27B: A8_GPIO8_19: vout1_d19.pr2_pru0_gpi16 */
+	{VOUT1_D20, (M12 | PIN_INPUT | MANUAL_MODE)},	   /* P8_28B: C9_GPIO8_20: vout1_d20.pr2_pru0_gpi17 */
+	{VOUT1_D21, (M12 | PIN_INPUT | MANUAL_MODE)},	   /* P8_29B: A9_GPIO8_21: vout1_d21.pr2_pru0_gpi18 */
+	{VOUT1_D22, (M12 | PIN_INPUT | MANUAL_MODE)},	   /* P8_30B: B9_GPIO8_22: vout1_d22.pr2_pru0_gpi19 */
+
+	/* Ethernet (and USB A overcurrent) */
+	{MDIO_MCLK, (M0 | PIN_OUTPUT | SLEWCONTROL)},	   /* V1 MDIO_CLK: mdio_mclk.mdio_mclk */
+	{MDIO_D, (M0 | PIN_INPUT | SLEWCONTROL)},	       /* U4 MDIO_D: mdio_d.mdio_d */
+	{UART3_RXD, (M14 | PIN_INPUT_PULLDOWN | SLEWCONTROL)},  /* V2 GPIO5_18 (USB A overcurrent): uart3_rxd.gpio5_18 */
+	{UART3_TXD, (M14 | PIN_INPUT_PULLDOWN | SLEWCONTROL)},  /* Y1 MII0_INT: uart3_txd.gpio5_19 */
+	{RGMII0_TXC, (M0 | PIN_OUTPUT | MANUAL_MODE)},	  /* W9 RGMII0_TXC: rgmii0_txc.rgmii0_txc */
+	{RGMII0_TXCTL, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* V9 RGMII0_TXCTL: rgmii0_txctl.rgmii0_txctl */
+	{RGMII0_TXD3, (M0 | PIN_OUTPUT | MANUAL_MODE)},	 /* V7 RGMII0_TXD3: rgmii0_txd3.rgmii0_txd3 */
+	{RGMII0_TXD2, (M0 | PIN_OUTPUT | MANUAL_MODE)},	 /* U7 RGMII0_TXD2: rgmii0_txd2.rgmii0_txd2 */
+	{RGMII0_TXD1, (M0 | PIN_OUTPUT | MANUAL_MODE)},	 /* V6 RGMII0_TXD1: rgmii0_txd1.rgmii0_txd1 */
+	{RGMII0_TXD0, (M0 | PIN_OUTPUT | MANUAL_MODE)},	 /* U6 RGMII0_TXD0: rgmii0_txd0.rgmii0_txd0 */
+	{RGMII0_RXC, (M0 | PIN_INPUT | MANUAL_MODE)},	   /* U5 RGMII0_RXC: rgmii0_rxc.rgmii0_rxc */
+	{RGMII0_RXCTL, (M0 | PIN_INPUT | MANUAL_MODE)},	 /* V5 RGMII0_RXCTL: rgmii0_rxctl.rgmii0_rxctl */
+	{RGMII0_RXD3, (M0 | PIN_INPUT | MANUAL_MODE)},	  /* V4 RGMII0_RXD3: rgmii0_rxd3.rgmii0_rxd3 */
+	{RGMII0_RXD2, (M0 | PIN_INPUT | MANUAL_MODE)},	  /* V3 RGMII0_RXD2: rgmii0_rxd2.rgmii0_rxd2 */
+	{RGMII0_RXD1, (M0 | PIN_INPUT | MANUAL_MODE)},	  /* Y2 RGMII0_RXD1: rgmii0_rxd1.rgmii0_rxd1 */
+	{RGMII0_RXD0, (M0 | PIN_INPUT | MANUAL_MODE)},	  /* W2 RGMII0_RXD0: rgmii0_rxd0.rgmii0_rxd0 */
+
+	{USB2_DRVVBUS, (M0 | PIN_OUTPUT_PULLDOWN | SLEWCONTROL)},       /* AC10 USB2_DRVVBUS: usb2_drvvbus.usb2_drvvbus */
+
+	{GPIO6_14, (M3 | PIN_INPUT)},			   /* P9_26A: E21_UART10_RXD: gpio6_14.uart10_rxd */
+	{GPIO6_15, (M0 | PIN_INPUT_PULLDOWN)},		  /* P9_24: F20_UART10_TXD: gpio6_15.gpio6_15 */
+	{GPIO6_16, (M0 | PIN_INPUT_PULLUP)},		    /* F21 PMIC_INT: gpio6_16.gpio6_16 */
+	{XREF_CLK0, (M14 | PIN_INPUT_PULLDOWN)},		/* P9_25: D18_GPIO6_17: xref_clk0.gpio6_17 */
+	{XREF_CLK1, (M14 | PIN_INPUT_PULLDOWN)},		/* P8_09: E17_TIMER14: xref_clk1.gpio6_18 */
+	{XREF_CLK2, (M14 | PIN_INPUT_PULLDOWN)},		/* P9_22A: B26_TIMER15: xref_clk2.gpio6_19 */
+	{XREF_CLK3, (M14 | PIN_INPUT_PULLDOWN)},		/* P9_41A: C23_CLKOUT3: xref_clk3.gpio6_20 */
+	{MCASP1_ACLKR, (M14 | PIN_INPUT_PULLDOWN)},	     /* P9_12: B14_MCASP_ACLKR: mcasp1_aclkr.gpio5_0 */
+	{MCASP1_AXR0, (M10 | PIN_INPUT_PULLUP | SLEWCONTROL)},  /* P9_18B: G12_GPIO5_2: mcasp1_axr0.i2c5_sda */
+	{MCASP1_AXR1, (M10 | PIN_INPUT_PULLUP | SLEWCONTROL)},  /* P9_17B: F12_GPIO5_3: mcasp1_axr1.i2c5_scl */
+	{MCASP1_AXR3, (M14 | PIN_INPUT_PULLDOWN)},	      /* J11 USR1: mcasp1_axr3.gpio5_5 */
+	{MCASP1_AXR5, (M14 | PIN_OUTPUT_PULLUP)},	       /* F13 eMMC_RSTn (missing on schematic): mcasp1_axr5.gpio5_7 */
+	{MCASP1_AXR8, (M14 | PIN_INPUT_PULLDOWN | SLEWCONTROL)},	/* P9_31A: B12_SPI3_SCLK: mcasp1_axr8.gpio5_10 */
+	{MCASP1_AXR9, (M14 | PIN_INPUT_PULLDOWN | SLEWCONTROL)},	/* P9_29A: A11_SPI3_D1: mcasp1_axr9.gpio5_11 */
+	{MCASP1_AXR10, (M14 | PIN_INPUT_PULLDOWN | SLEWCONTROL)},       /* P9_30: B13_SPI3_D0: mcasp1_axr10.gpio5_12 */
+	{MCASP1_AXR11, (M14 | PIN_INPUT_PULLDOWN | SLEWCONTROL)},       /* P9_28: A12_SPI3_CS0: mcasp1_axr11.gpio4_17 */
+	{MCASP1_AXR12, (M14 | PIN_INPUT | SLEWCONTROL)},		/* P9_42A: E14_GPIO4_18: mcasp1_axr12.gpio4_18 */
+	{MCASP1_AXR13, (M14 | PIN_INPUT_PULLDOWN | SLEWCONTROL)},       /* P8_10: A13_TIMER10: mcasp1_axr13.gpio6_4 */
+	{MCASP1_AXR14, (M14 | PIN_INPUT_PULLDOWN | SLEWCONTROL)},       /* P8_07: G14_TIMER11: mcasp1_axr14.gpio6_5 */
+	{MCASP1_AXR15, (M14 | PIN_INPUT_PULLDOWN | SLEWCONTROL)},       /* P8_08: F14_TIMER12: mcasp1_axr15.gpio6_6 */
+	{MCASP3_AXR0, (M4 | PIN_INPUT | SLEWCONTROL)},		  /* P9_11A: B19_UART5_RXD: mcasp3_axr0.uart5_rxd */
+
+	/* microSD Socket */
+	{MMC1_CLK, (M0 | PIN_INPUT_PULLUP)},		    /*  W6: mmc1_clk.mmc1_clk */
+	{MMC1_CMD, (M0 | PIN_INPUT_PULLUP)},		    /*  Y6: mmc1_cmd.mmc1_cmd */
+	{MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)},		   /* AA6: mmc1_dat0.mmc1_dat0 */
+	{MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)},		   /*  Y4: mmc1_dat1.mmc1_dat1 */
+	{MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)},		   /* AA5: mmc1_dat2.mmc1_dat2 */
+	{MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)},		   /*  Y3: mmc1_dat3.mmc1_dat3 */
+	{MMC1_SDCD, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)},    /*  W7: mmc1_sdcd.gpio6_27 */
+
+	{MMC3_CLK, (M14 | PIN_INPUT_PULLUP)},		   /* P8_21: AD4_MMC3_CLK: mmc3_clk.gpio6_29 */
+	{MMC3_CMD, (M14 | PIN_INPUT_PULLUP)},		   /* P8_20: AC4_MMC3_CMD: mmc3_cmd.gpio6_30 */
+	{MMC3_DAT0, (M14 | PIN_INPUT_PULLUP)},		  /* P8_25: AC7_MMC3_DATA0: mmc3_dat0.gpio6_31 */
+	{MMC3_DAT1, (M14 | PIN_INPUT_PULLUP)},		  /* P8_24: AC6_MMC3_DATA1: mmc3_dat1.gpio7_0 */
+	{MMC3_DAT2, (M14 | PIN_INPUT_PULLUP)},		  /* P8_05: AC9_MMC3_DATA2: mmc3_dat2.gpio7_1 */
+	{MMC3_DAT3, (M14 | PIN_INPUT_PULLUP)},		  /* P8_06: AC3_MMC3_DATA3: mmc3_dat3.gpio7_2 */
+	{MMC3_DAT4, (M14 | PIN_INPUT_PULLUP)},		  /* P8_23: AC8_MMC3_DATA4: mmc3_dat4.gpio1_22 */
+	{MMC3_DAT5, (M14 | PIN_INPUT_PULLUP)},		  /* P8_22: AD6_MMC3_DATA5: mmc3_dat5.gpio1_23 */
+	{MMC3_DAT6, (M14 | PIN_INPUT_PULLUP)},		  /* P8_03: AB8_MMC3_DATA6: mmc3_dat6.gpio1_24 */
+	{MMC3_DAT7, (M14 | PIN_INPUT_PULLUP)},		  /* P8_04: AB5_MMC3_DATA7: mmc3_dat7.gpio1_25 */
+	{SPI1_CS1, (M14 | PIN_INPUT_PULLDOWN)},		 /* P9_23: A22_SPI2_CS1: spi1_cs1.gpio7_11 */
+	{SPI1_CS2, (M6 | PIN_INPUT | SLEWCONTROL)},	     /* B21 HDMI_DDC_HPD: spi1_cs2.hdmi1_hpd */
+	{SPI2_SCLK, (M1 | PIN_INPUT)},			  /* P9_22B: A26_UART3_RXD: spi2_sclk.uart3_rxd */
+	{SPI2_D0, (M14 | PIN_INPUT | SLEWCONTROL)},	     /* P9_18A: G17_SPI2_D0: spi2_d0.gpio7_16 */
+	{SPI2_CS0, (M14 | PIN_INPUT | SLEWCONTROL)},	    /* P9_17A: B24_SPI2_CS0: spi2_cs0.gpio7_17 */
+	{DCAN1_TX, (M2 | PIN_INPUT | SLEWCONTROL)},	     /* G20 unused: dcan1_tx.uart8_rxd */
+	{DCAN1_RX, (M6 | PIN_INPUT | SLEWCONTROL)},	     /* G19 unused: dcan1_rx.hdmi1_cec */
+
+	/* BeagleBone AI: Debug UART */
+	{UART1_RXD, (M0 | PIN_INPUT_PULLDOWN | SLEWCONTROL)},   /* uart1_rxd.uart1_rxd */
+	{UART1_TXD, (M0 | PIN_OUTPUT_PULLDOWN | SLEWCONTROL)},  /* uart1_txd.uart1_txd */
+
+	/* WiFi MMC */
+	{UART1_CTSN, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)},    /* uart1_ctsn.mmc4_clk */
+	{UART1_RTSN, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)},    /* uart1_rtsn.mmc4_cmd */
+	{UART2_RXD, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)},     /* uart2_rxd.mmc4_dat0 */
+	{UART2_TXD, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)},     /* uart2_txd.mmc4_dat1 */
+	{UART2_CTSN, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)},    /* uart2_ctsn.mmc4_dat2 */
+	{UART2_RTSN, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)},    /* uart2_rtsn.mmc4_dat3 */
+
+	/* On-board I2C */
+	{I2C1_SDA, (M0 | PIN_INPUT_PULLUP)},    /* i2c1_sda.i2c1_sda */
+	{I2C1_SCL, (M0 | PIN_INPUT_PULLUP)},    /* i2c1_scl.i2c1_scl */
+
+	/* HDMI I2C */
+	{I2C2_SDA, (M1 | PIN_INPUT_PULLUP)},    /* i2c2_sda.hdmi1_ddc_scl */
+	{I2C2_SCL, (M1 | PIN_INPUT_PULLUP)},    /* i2c2_scl.hdmi1_ddc_sda */
+
+	{ON_OFF, (M0 | PIN_OUTPUT)},		    /*  Y11: on_off.on_off */
+	{RTC_PORZ, (M0 | PIN_INPUT)},		   /* AB17: rtc_porz.rtc_porz */
+	{TMS, (M0 | PIN_INPUT_PULLUP)},		 /*  F18: tms.tms */
+	{TDI, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},   /*  D23: tdi.tdi */
+	{TDO, (M0 | PIN_OUTPUT)},		       /*  F19: tdo.tdo */
+	{TCLK, (M0 | PIN_INPUT_PULLDOWN)},	      /*  E20: tclk.tclk */
+	{TRSTN, (M0 | PIN_INPUT)},		      /*  D20: trstn.trstn */
+	{RTCK, (M0 | PIN_OUTPUT)},		      /*  E18: rtck.rtck */
+	{EMU0, (M0 | PIN_INPUT)},		       /*  G21: emu0.emu0 */
+	{EMU1, (M0 | PIN_INPUT)},		       /*  D24: emu1.emu1 */
+	{RESETN, (M0 | PIN_INPUT_PULLUP)},	      /*  E23: resetn.resetn */
+	{NMIN_DSP, (M0 | PIN_INPUT)},		   /*  D21: nmin_dsp.nmin_dsp */
+	{RSTOUTN, (M0 | PIN_OUTPUT)},		   /*  F23: rstoutn.rstoutn */
+};
+
 const struct pad_conf_entry core_padconf_array_delta_x15_sr1_1[] = {
 	{MMC1_SDWP, (M14 | PIN_INPUT | SLEWCONTROL)},	/* mmc1_sdwp.gpio6_28 */
 	{VOUT1_CLK, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* vout1_clk.vout1_clk */
@@ -297,6 +494,69 @@ const struct pad_conf_entry core_padconf_array_delta_x15_sr2_0[] = {
 	{VOUT1_D23, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d23.vout1_d23 */
 };
 
+const struct iodelay_cfg_entry iodelay_cfg_array_bbai[] = {
+	{0x0190, 274, 0},       /* CFG_GPMC_A19_OEN */
+	{0x0194, 162, 0},       /* CFG_GPMC_A19_OUT */
+	{0x01A8, 401, 0},       /* CFG_GPMC_A20_OEN */
+	{0x01AC, 73, 0},        /* CFG_GPMC_A20_OUT */
+	{0x01B4, 465, 0},       /* CFG_GPMC_A21_OEN */
+	{0x01B8, 115, 0},       /* CFG_GPMC_A21_OUT */
+	{0x01C0, 633, 0},       /* CFG_GPMC_A22_OEN */
+	{0x01C4, 47, 0},        /* CFG_GPMC_A22_OUT */
+	{0x01D0, 935, 280},     /* CFG_GPMC_A23_OUT */
+	{0x01D8, 621, 0},       /* CFG_GPMC_A24_OEN */
+	{0x01DC, 0, 0},         /* CFG_GPMC_A24_OUT */
+	{0x01E4, 183, 0},       /* CFG_GPMC_A25_OEN */
+	{0x01E8, 0, 0},         /* CFG_GPMC_A25_OUT */
+	{0x01F0, 467, 0},       /* CFG_GPMC_A26_OEN */
+	{0x01F4, 0, 0},         /* CFG_GPMC_A26_OUT */
+	{0x01FC, 262, 0},       /* CFG_GPMC_A27_OEN */
+	{0x0200, 46, 0},        /* CFG_GPMC_A27_OUT */
+	{0x0364, 684, 0},       /* CFG_GPMC_CS1_OEN */
+	{0x0368, 76, 0},        /* CFG_GPMC_CS1_OUT */
+	{0x06F0, 260, 0},       /* CFG_RGMII0_RXC_IN */
+	{0x06FC, 0, 1412},      /* CFG_RGMII0_RXCTL_IN */
+	{0x0708, 123, 1047},    /* CFG_RGMII0_RXD0_IN */
+	{0x0714, 139, 1081},    /* CFG_RGMII0_RXD1_IN */
+	{0x0720, 195, 1100},    /* CFG_RGMII0_RXD2_IN */
+	{0x072C, 239, 1216},    /* CFG_RGMII0_RXD3_IN */
+	{0x0740, 89, 0},        /* CFG_RGMII0_TXC_OUT */
+	{0x074C, 15, 125},      /* CFG_RGMII0_TXCTL_OUT */
+	{0x0758, 339, 162},     /* CFG_RGMII0_TXD0_OUT */
+	{0x0764, 146, 94},      /* CFG_RGMII0_TXD1_OUT */
+	{0x0770, 0, 27},        /* CFG_RGMII0_TXD2_OUT */
+	{0x077C, 291, 205},     /* CFG_RGMII0_TXD3_OUT */
+	{0x0840, 0, 0},         /* CFG_UART1_CTSN_IN */
+	{0x0848, 0, 0},         /* CFG_UART1_CTSN_OUT */
+	{0x084C, 307, 0},       /* CFG_UART1_RTSN_IN */
+	{0x0850, 0, 0},         /* CFG_UART1_RTSN_OEN */
+	{0x0854, 0, 0},         /* CFG_UART1_RTSN_OUT */
+	{0x0870, 785, 0},       /* CFG_UART2_CTSN_IN */
+	{0x0874, 0, 0},         /* CFG_UART2_CTSN_OEN */
+	{0x0878, 0, 0},         /* CFG_UART2_CTSN_OUT */
+	{0x087C, 613, 0},       /* CFG_UART2_RTSN_IN */
+	{0x0880, 0, 0},         /* CFG_UART2_RTSN_OEN */
+	{0x0884, 0, 0},         /* CFG_UART2_RTSN_OUT */
+	{0x0888, 683, 0},       /* CFG_UART2_RXD_IN */
+	{0x088C, 0, 0},         /* CFG_UART2_RXD_OEN */
+	{0x0890, 0, 0},	 	/* CFG_UART2_RXD_OUT */
+	{0x0894, 835, 0},       /* CFG_UART2_TXD_IN */
+	{0x0898, 0, 0},         /* CFG_UART2_TXD_OEN */
+	{0x089C, 0, 0},         /* CFG_UART2_TXD_OUT */
+	{0x0ABC, 0, 1100},      /* CFG_VIN2A_D19_IN */
+	{0x0AE0, 0, 1300},      /* CFG_VIN2A_D21_IN */
+	{0x0B1C, 0, 1000},      /* CFG_VIN2A_D4_IN */
+	{0x0B28, 0, 1700},      /* CFG_VIN2A_D5_IN */
+	{0x0C18, 0, 500},       /* CFG_VOUT1_D19_IN */
+	{0x0C30, 0, 716},       /* CFG_VOUT1_D20_IN */
+	{0x0C3C, 0, 0},         /* CFG_VOUT1_D21_IN */
+	{0x0C48, 0, 404},       /* CFG_VOUT1_D22_IN */
+	{0x0C78, 0, 0},         /* CFG_VOUT1_D4_IN */
+	{0x0C84, 0, 365},       /* CFG_VOUT1_D5_IN */
+	{0x0C90, 0, 0},	 	/* CFG_VOUT1_D6_IN */
+	{0x0C9C, 0, 218},       /* CFG_VOUT1_D7_IN */
+};
+
 const struct pad_conf_entry core_padconf_array_essential_am574x_idk[] = {
 	{GPMC_A0, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a0.vin4b_d0 */
 	{GPMC_A1, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a1.vin4b_d1 */
@@ -998,8 +1258,28 @@ const struct pad_conf_entry early_padconf[] = {
 	{UART2_RTSN, (M1 | PIN_INPUT_SLEW)},	/* uart2_rtsn.uart3_txd */
 	{I2C1_SDA, (PIN_INPUT_PULLUP | M0)},	/* I2C1_SDA */
 	{I2C1_SCL, (PIN_INPUT_PULLUP | M0)},	/* I2C1_SCL */
+
+	/* BeagleBone AI: Debug UART */
+	{UART1_RXD, (M0 | PIN_INPUT_PULLDOWN | SLEWCONTROL)},   /* uart1_rxd.uart1_rxd */
+	{UART1_TXD, (M0 | PIN_OUTPUT_PULLDOWN | SLEWCONTROL)},  /* uart1_txd.uart1_txd */
 };
 
+#ifdef CONFIG_SUPPORT_EMMC_BOOT
+const struct pad_conf_entry emmc_padconf[] = {
+	{GPMC_A19, (M1 | PIN_INPUT_PULLUP)},		    /*  K7: gpmc_a19.mmc2_dat4 */
+	{GPMC_A20, (M1 | PIN_INPUT_PULLUP)},		    /*  M7: gpmc_a20.mmc2_dat5 */
+	{GPMC_A21, (M1 | PIN_INPUT_PULLUP)},		    /*  J5: gpmc_a21.mmc2_dat6 */
+	{GPMC_A22, (M1 | PIN_INPUT_PULLUP)},		    /*  K6: gpmc_a22.mmc2_dat7 */
+	{GPMC_A23, (M1 | PIN_INPUT_PULLUP)},		    /*  J7: gpmc_a23.mmc2_clk */
+	{GPMC_A24, (M1 | PIN_INPUT_PULLUP)},		    /*  J4: gpmc_a24.mmc2_dat0 */
+	{GPMC_A25, (M1 | PIN_INPUT_PULLUP)},		    /*  J6: gpmc_a25.mmc2_dat1 */
+	{GPMC_A26, (M1 | PIN_INPUT_PULLUP)},		    /*  H4: gpmc_a26.mmc2_dat2 */
+	{GPMC_A27, (M1 | PIN_INPUT_PULLUP)},		    /*  H5: gpmc_a27.mmc2_dat3 */
+	{GPMC_CS1, (M1 | PIN_INPUT_PULLUP)},		    /*  H6: gpmc_cs1.mmc2_cmd */
+	{MCASP1_AXR5, (M14 | PIN_OUTPUT_PULLUP)},	       /* F13: eMMC_RSTn (missing on schematic): mcasp1_axr5.gpio5_7 */
+};
+#endif
+
 #ifdef CONFIG_IODELAY_RECALIBRATION
 const struct iodelay_cfg_entry iodelay_cfg_array_x15_sr1_1[] = {
 	{0x0114, 2980, 0},	/* CFG_GPMC_A0_IN */
diff --git a/board/ti/am65x/evm.c b/board/ti/am65x/evm.c
index 4d86757c39..a610879424 100644
--- a/board/ti/am65x/evm.c
+++ b/board/ti/am65x/evm.c
@@ -105,10 +105,8 @@ int ft_board_setup(void *blob, bd_t *bd)
 #if defined(CONFIG_TI_SECURE_DEVICE)
 	/* Make HW RNG reserved for secure world use */
 	ret = fdt_disable_node(blob, "/interconnect@100000/trng@4e10000");
-	if (ret) {
+	if (ret)
 		printf("%s: disabling TRGN failed %d\n", __func__, ret);
-		return ret;
-	}
 #endif
 
 	return 0;
diff --git a/board/ti/common/board_detect.c b/board/ti/common/board_detect.c
index 564d2f7046..cbd35f2434 100644
--- a/board/ti/common/board_detect.c
+++ b/board/ti/common/board_detect.c
@@ -14,6 +14,9 @@
 #include <dm/uclass.h>
 #include <env.h>
 #include <i2c.h>
+#include <mmc.h>
+#include <errno.h>
+#include <malloc.h>
 
 #include "board_detect.h"
 
@@ -91,7 +94,7 @@ static int __maybe_unused ti_i2c_eeprom_get(int bus_addr, int dev_addr,
 	rc = uclass_get_device_by_seq(UCLASS_I2C, bus_addr, &bus);
 	if (rc)
 		return rc;
-	rc = i2c_get_chip(bus, dev_addr, 1, &dev);
+	rc = dm_i2c_probe(bus, dev_addr, 0, &dev);
 	if (rc)
 		return rc;
 
@@ -171,6 +174,79 @@ static int __maybe_unused ti_i2c_eeprom_get(int bus_addr, int dev_addr,
 	return 0;
 }
 
+int __maybe_unused ti_emmc_boardid_get(void)
+{
+	int rc;
+	struct udevice *dev;
+	struct mmc *mmc;
+	struct ti_common_eeprom *ep;
+	struct ti_am_eeprom brdid;
+	struct blk_desc *bdesc;
+	uchar *buffer;
+
+	ep = TI_EEPROM_DATA;
+	if (ep->header == TI_EEPROM_HEADER_MAGIC)
+		return 0;       /* EEPROM has already been read */
+
+	/* Initialize with a known bad marker for emmc fails.. */
+	ep->header = TI_DEAD_EEPROM_MAGIC;
+	ep->name[0] = 0x0;
+	ep->version[0] = 0x0;
+	ep->serial[0] = 0x0;
+	ep->config[0] = 0x0;
+
+	/* uclass object initialization */
+	rc = mmc_initialize(NULL);
+	if (rc)
+		return rc;
+
+	/* Set device to /dev/mmcblk1 */
+	rc = uclass_get_device(UCLASS_MMC, 1, &dev);
+	if (rc)
+		return rc;
+
+	/* Grab the mmc device */
+	mmc = mmc_get_mmc_dev(dev);
+	if (!mmc)
+		return -ENODEV;
+
+	/* mmc hardware initialization routine */
+	mmc_init(mmc);
+
+	/* Set partition to /dev/mmcblk1boot1 */
+	rc = mmc_switch_part(mmc, 2);
+	if (rc)
+		return rc;
+
+	buffer = malloc(mmc->read_bl_len);
+	if (!buffer)
+		return -ENOMEM;
+
+	bdesc = mmc_get_blk_desc(mmc);
+
+	/* blk_dread returns the number of blocks read*/
+	if (blk_dread(bdesc, 0L, 1, buffer) != 1) {
+		rc = -EIO;
+		goto cleanup;
+	}
+
+	memcpy(&brdid, buffer, sizeof(brdid));
+
+	/* Write out the ep struct values */
+	ep->header = brdid.header;
+	strlcpy(ep->name, brdid.name, TI_EEPROM_HDR_NAME_LEN + 1);
+	ti_eeprom_string_cleanup(ep->name);
+	strlcpy(ep->version, brdid.version, TI_EEPROM_HDR_REV_LEN + 1);
+	ti_eeprom_string_cleanup(ep->version);
+	strlcpy(ep->serial, brdid.serial, TI_EEPROM_HDR_SERIAL_LEN + 1);
+	ti_eeprom_string_cleanup(ep->serial);
+
+cleanup:
+	free(buffer);
+
+	return rc;
+}
+
 int __maybe_unused ti_i2c_eeprom_am_set(const char *name, const char *rev)
 {
 	struct ti_common_eeprom *ep;
@@ -472,6 +548,15 @@ int __maybe_unused ti_i2c_eeprom_am6_get_base(int bus_addr, int dev_addr)
 	return ret;
 }
 
+bool __maybe_unused board_ti_k3_is(char *name_tag)
+{
+	struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
+
+	if (ep->header == TI_DEAD_EEPROM_MAGIC)
+		return false;
+	return !strncmp(ep->name, name_tag, AM6_EEPROM_HDR_NAME_LEN);
+}
+
 bool __maybe_unused board_ti_is(char *name_tag)
 {
 	struct ti_common_eeprom *ep = TI_EEPROM_DATA;
diff --git a/board/ti/common/board_detect.h b/board/ti/common/board_detect.h
index a45d8961b9..5835af5344 100644
--- a/board/ti/common/board_detect.h
+++ b/board/ti/common/board_detect.h
@@ -268,6 +268,15 @@ struct ti_am6_eeprom {
 int ti_i2c_eeprom_am_get(int bus_addr, int dev_addr);
 
 /**
+ * ti_emmc_boardid_get() - Fetch board ID information from eMMC
+ *
+ * ep in SRAM is populated by the this function that is currently
+ * based on BeagleBone AI, but could be made more general across AM*
+ * platforms.
+ */
+int __maybe_unused ti_emmc_boardid_get(void);
+
+/**
  * ti_i2c_eeprom_dra7_get() - Consolidated eeprom data for DRA7 TI EVMs
  * @bus_addr:	I2C bus address
  * @dev_addr:	I2C slave address
@@ -311,6 +320,15 @@ int __maybe_unused ti_i2c_eeprom_am6_get_base(int bus_addr, int dev_addr);
 bool board_ti_is(char *name_tag);
 
 /**
+ * board_ti_k3_is() - Board detection logic for TI K3 EVMs
+ * @name_tag:	Tag used in eeprom for the board
+ *
+ * Return: false if board information does not match OR eeprom wasn't read.
+ *	   true otherwise
+ */
+bool board_ti_k3_is(char *name_tag);
+
+/**
  * board_ti_rev_is() - Compare board revision for TI EVMs
  * @rev_tag:	Revision tag to check in eeprom
  * @cmp_len:	How many chars to compare?
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index 94001a4dc3..8132cdfbf2 100644
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -13,6 +13,7 @@
 #include <env.h>
 #include <fdt_support.h>
 #include <init.h>
+#include <spl.h>
 #include <palmas.h>
 #include <sata.h>
 #include <serial.h>
@@ -32,7 +33,6 @@
 #include <dwc3-omap-uboot.h>
 #include <i2c.h>
 #include <ti-usb-phy-uboot.h>
-#include <miiphy.h>
 
 #include "mux_data.h"
 #include "../common/board_detect.h"
@@ -48,10 +48,6 @@
 #define board_ti_get_emif_size()	board_ti_get_emif1_size() +	\
 					board_ti_get_emif2_size()
 
-#ifdef CONFIG_DRIVER_TI_CPSW
-#include <cpsw.h>
-#endif
-
 DECLARE_GLOBAL_DATA_PTR;
 
 /* GPIO 7_11 */
@@ -992,106 +988,6 @@ int spl_start_uboot(void)
 }
 #endif
 
-#ifdef CONFIG_DRIVER_TI_CPSW
-extern u32 *const omap_si_rev;
-
-static void cpsw_control(int enabled)
-{
-	/* VTP can be added here */
-
-	return;
-}
-
-static struct cpsw_slave_data cpsw_slaves[] = {
-	{
-		.slave_reg_ofs	= 0x208,
-		.sliver_reg_ofs	= 0xd80,
-		.phy_addr	= 2,
-	},
-	{
-		.slave_reg_ofs	= 0x308,
-		.sliver_reg_ofs	= 0xdc0,
-		.phy_addr	= 3,
-	},
-};
-
-static struct cpsw_platform_data cpsw_data = {
-	.mdio_base		= CPSW_MDIO_BASE,
-	.cpsw_base		= CPSW_BASE,
-	.mdio_div		= 0xff,
-	.channels		= 8,
-	.cpdma_reg_ofs		= 0x800,
-	.slaves			= 2,
-	.slave_data		= cpsw_slaves,
-	.ale_reg_ofs		= 0xd00,
-	.ale_entries		= 1024,
-	.host_port_reg_ofs	= 0x108,
-	.hw_stats_reg_ofs	= 0x900,
-	.bd_ram_ofs		= 0x2000,
-	.mac_control		= (1 << 5),
-	.control		= cpsw_control,
-	.host_port_num		= 0,
-	.version		= CPSW_CTRL_VERSION_2,
-};
-
-int board_eth_init(bd_t *bis)
-{
-	int ret;
-	uint8_t mac_addr[6];
-	uint32_t mac_hi, mac_lo;
-	uint32_t ctrl_val;
-
-	/* try reading mac address from efuse */
-	mac_lo = readl((*ctrl)->control_core_mac_id_0_lo);
-	mac_hi = readl((*ctrl)->control_core_mac_id_0_hi);
-	mac_addr[0] = (mac_hi & 0xFF0000) >> 16;
-	mac_addr[1] = (mac_hi & 0xFF00) >> 8;
-	mac_addr[2] = mac_hi & 0xFF;
-	mac_addr[3] = (mac_lo & 0xFF0000) >> 16;
-	mac_addr[4] = (mac_lo & 0xFF00) >> 8;
-	mac_addr[5] = mac_lo & 0xFF;
-
-	if (!env_get("ethaddr")) {
-		printf("<ethaddr> not set. Validating first E-fuse MAC\n");
-
-		if (is_valid_ethaddr(mac_addr))
-			eth_env_set_enetaddr("ethaddr", mac_addr);
-	}
-
-	mac_lo = readl((*ctrl)->control_core_mac_id_1_lo);
-	mac_hi = readl((*ctrl)->control_core_mac_id_1_hi);
-	mac_addr[0] = (mac_hi & 0xFF0000) >> 16;
-	mac_addr[1] = (mac_hi & 0xFF00) >> 8;
-	mac_addr[2] = mac_hi & 0xFF;
-	mac_addr[3] = (mac_lo & 0xFF0000) >> 16;
-	mac_addr[4] = (mac_lo & 0xFF00) >> 8;
-	mac_addr[5] = mac_lo & 0xFF;
-
-	if (!env_get("eth1addr")) {
-		if (is_valid_ethaddr(mac_addr))
-			eth_env_set_enetaddr("eth1addr", mac_addr);
-	}
-
-	ctrl_val = readl((*ctrl)->control_core_control_io1) & (~0x33);
-	ctrl_val |= 0x22;
-	writel(ctrl_val, (*ctrl)->control_core_control_io1);
-
-	if (*omap_si_rev == DRA722_ES1_0)
-		cpsw_data.active_slave = 1;
-
-	if (board_is_dra72x_revc_or_later()) {
-		cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RGMII_ID;
-		cpsw_slaves[1].phy_if = PHY_INTERFACE_MODE_RGMII_ID;
-	}
-
-	ret = cpsw_register(&cpsw_data);
-	if (ret < 0)
-		printf("Error %d registering CPSW switch\n", ret);
-
-	return ret;
-}
-#endif
-
 #ifdef CONFIG_BOARD_EARLY_INIT_F
 /* VTT regulator enable */
 static inline void vtt_regulator_enable(void)
diff --git a/board/ti/j721e/Kconfig b/board/ti/j721e/Kconfig
index 88097df653..e56dc53bfa 100644
--- a/board/ti/j721e/Kconfig
+++ b/board/ti/j721e/Kconfig
@@ -11,6 +11,8 @@ config TARGET_J721E_A72_EVM
 	bool "TI K3 based J721E EVM running on A72"
 	select ARM64
 	select SOC_K3_J721E
+	select BOARD_LATE_INIT
+	imply TI_I2C_BOARD_DETECT
 	select SYS_DISABLE_DCACHE_OPS
 
 config TARGET_J721E_R5_EVM
@@ -23,6 +25,7 @@ config TARGET_J721E_R5_EVM
 	select SPL_RAM
 	select K3_J721E_DDRSS
 	imply SYS_K3_SPL_ATF
+	imply TI_I2C_BOARD_DETECT
 
 endchoice
 
@@ -37,6 +40,8 @@ config SYS_VENDOR
 config SYS_CONFIG_NAME
        default "j721e_evm"
 
+source "board/ti/common/Kconfig"
+
 endif
 
 if TARGET_J721E_R5_EVM
@@ -53,4 +58,6 @@ config SYS_CONFIG_NAME
 config SPL_LDSCRIPT
 	default "arch/arm/mach-omap2/u-boot-spl.lds"
 
+source "board/ti/common/Kconfig"
+
 endif
diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c
index 51b121ce05..aa2240b852 100644
--- a/board/ti/j721e/evm.c
+++ b/board/ti/j721e/evm.c
@@ -9,10 +9,21 @@
 
 #include <common.h>
 #include <init.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/hardware.h>
+#include <asm/gpio.h>
 #include <asm/io.h>
 #include <spl.h>
 #include <asm/arch/sys_proto.h>
 
+#include "../common/board_detect.h"
+
+#define board_is_j721e_som()	(board_ti_k3_is("J721EX-PM1-SOM") || \
+				 board_ti_k3_is("J721EX-PM2-SOM"))
+
+/* Max number of MAC addresses that are parsed/processed per daughter card */
+#define DAUGHTER_CARD_NO_OF_MAC_ADDR	8
+
 DECLARE_GLOBAL_DATA_PTR;
 
 int board_init(void)
@@ -81,3 +92,256 @@ int ft_board_setup(void *blob, bd_t *bd)
 	return ret;
 }
 #endif
+
+int do_board_detect(void)
+{
+	int ret;
+
+	ret = ti_i2c_eeprom_am6_get_base(CONFIG_EEPROM_BUS_ADDRESS,
+					 CONFIG_EEPROM_CHIP_ADDRESS);
+	if (ret)
+		pr_err("Reading on-board EEPROM at 0x%02x failed %d\n",
+		       CONFIG_EEPROM_CHIP_ADDRESS, ret);
+
+	return ret;
+}
+
+int checkboard(void)
+{
+	struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
+
+	if (do_board_detect())
+		/* EEPROM not populated */
+		printf("Board: %s rev %s\n", "J721EX-PM1-SOM", "E2");
+	else
+		printf("Board: %s rev %s\n", ep->name, ep->version);
+
+	return 0;
+}
+
+static void setup_board_eeprom_env(void)
+{
+	char *name = "j721e";
+
+	if (do_board_detect())
+		goto invalid_eeprom;
+
+	if (board_is_j721e_som())
+		name = "j721e";
+	else
+		printf("Unidentified board claims %s in eeprom header\n",
+		       board_ti_get_name());
+
+invalid_eeprom:
+	set_board_info_env_am6(name);
+}
+
+static void setup_serial(void)
+{
+	struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
+	unsigned long board_serial;
+	char *endp;
+	char serial_string[17] = { 0 };
+
+	if (env_get("serial#"))
+		return;
+
+	board_serial = simple_strtoul(ep->serial, &endp, 16);
+	if (*endp != '\0') {
+		pr_err("Error: Can't set serial# to %s\n", ep->serial);
+		return;
+	}
+
+	snprintf(serial_string, sizeof(serial_string), "%016lx", board_serial);
+	env_set("serial#", serial_string);
+}
+
+/*
+ * Declaration of daughtercards to probe. Note that when adding more
+ * cards they should be grouped by the 'i2c_addr' field to allow for a
+ * more efficient probing process.
+ */
+static const struct {
+	u8 i2c_addr;		/* I2C address of card EEPROM */
+	char *card_name;	/* EEPROM-programmed card name */
+	char *dtbo_name;	/* Device tree overlay to apply */
+	u8 eth_offset;		/* ethXaddr MAC address index offset */
+} ext_cards[] = {
+	{
+		0x51,
+		"J7X-BASE-CPB",
+		"",		/* No dtbo for this board */
+		0,
+	},
+	{
+		0x52,
+		"J7X-INFOTAN-EXP",
+		"",		/* No dtbo for this board */
+		0,
+	},
+	{
+		0x52,
+		"J7X-GESI-EXP",
+		"",		/* No dtbo for this board */
+		5,		/* Start populating from eth5addr */
+	},
+	{
+		0x54,
+		"J7X-VSC8514-ETH",
+		"",		/* No dtbo for this board */
+		1,		/* Start populating from eth1addr */
+	},
+};
+
+static bool daughter_card_detect_flags[ARRAY_SIZE(ext_cards)];
+
+const char *board_fit_get_additionnal_images(int index, const char *type)
+{
+	int i, j;
+
+	if (strcmp(type, FIT_FDT_PROP))
+		return NULL;
+
+	j = 0;
+	for (i = 0; i < ARRAY_SIZE(ext_cards); i++) {
+		if (daughter_card_detect_flags[i]) {
+			if (j == index) {
+				/*
+				 * Return dtbo name only if populated,
+				 * otherwise stop parsing here.
+				 */
+				if (strlen(ext_cards[i].dtbo_name))
+					return ext_cards[i].dtbo_name;
+				else
+					return NULL;
+			};
+
+			j++;
+		}
+	}
+
+	return NULL;
+}
+
+static int probe_daughtercards(void)
+{
+	char mac_addr[DAUGHTER_CARD_NO_OF_MAC_ADDR][TI_EEPROM_HDR_ETH_ALEN];
+	bool eeprom_read_success;
+	struct ti_am6_eeprom ep;
+	u8 previous_i2c_addr;
+	u8 mac_addr_cnt;
+	int i;
+	int ret;
+
+	/* Mark previous I2C address variable as not populated */
+	previous_i2c_addr = 0xff;
+
+	/* No EEPROM data was read yet */
+	eeprom_read_success = false;
+
+	/* Iterate through list of daughtercards */
+	for (i = 0; i < ARRAY_SIZE(ext_cards); i++) {
+		/* Obtain card-specific I2C address */
+		u8 i2c_addr = ext_cards[i].i2c_addr;
+
+		/* Read card EEPROM if not already read previously */
+		if (i2c_addr != previous_i2c_addr) {
+			/* Store I2C address so we can avoid reading twice */
+			previous_i2c_addr = i2c_addr;
+
+			/* Get and parse the daughter card EEPROM record */
+			ret = ti_i2c_eeprom_am6_get(CONFIG_EEPROM_BUS_ADDRESS,
+						    i2c_addr,
+						    &ep,
+						    (char **)mac_addr,
+						    DAUGHTER_CARD_NO_OF_MAC_ADDR,
+						    &mac_addr_cnt);
+			if (ret) {
+				debug("%s: No daughtercard EEPROM at 0x%02x found %d\n",
+				      __func__, i2c_addr, ret);
+				eeprom_read_success = false;
+				/* Skip to the next daughtercard to probe */
+				continue;
+			}
+
+			/* EEPROM read successful, okay to further process. */
+			eeprom_read_success = true;
+		}
+
+		/* Only continue processing if EEPROM data was read */
+		if (!eeprom_read_success)
+			continue;
+
+		/* Only process the parsed data if we found a match */
+		if (strncmp(ep.name, ext_cards[i].card_name, sizeof(ep.name)))
+			continue;
+
+		printf("Detected: %s rev %s\n", ep.name, ep.version);
+		daughter_card_detect_flags[i] = true;
+
+#ifndef CONFIG_SPL_BUILD
+		int j;
+		/*
+		 * Populate any MAC addresses from daughtercard into the U-Boot
+		 * environment, starting with a card-specific offset so we can
+		 * have multiple ext_cards contribute to the MAC pool in a well-
+		 * defined manner.
+		 */
+		for (j = 0; j < mac_addr_cnt; j++) {
+			if (!is_valid_ethaddr((u8 *)mac_addr[j]))
+				continue;
+
+			eth_env_set_enetaddr_by_index("eth",
+						      ext_cards[i].eth_offset + j,
+						      (uchar *)mac_addr[j]);
+		}
+#endif
+	}
+#ifndef CONFIG_SPL_BUILD
+	char name_overlays[1024] = { 0 };
+
+	for (i = 0; i < ARRAY_SIZE(ext_cards); i++) {
+		if (!daughter_card_detect_flags[i])
+			continue;
+
+		/* Skip if no overlays are to be added */
+		if (!strlen(ext_cards[i].dtbo_name))
+			continue;
+
+		/*
+		 * Make sure we are not running out of buffer space by checking
+		 * if we can fit the new overlay, a trailing space to be used
+		 * as a separator, plus the terminating zero.
+		 */
+		if (strlen(name_overlays) + strlen(ext_cards[i].dtbo_name) + 2 >
+		    sizeof(name_overlays))
+			return -ENOMEM;
+
+		/* Append to our list of overlays */
+		strcat(name_overlays, ext_cards[i].dtbo_name);
+		strcat(name_overlays, " ");
+	}
+
+	/* Apply device tree overlay(s) to the U-Boot environment, if any */
+	if (strlen(name_overlays))
+		return env_set("name_overlays", name_overlays);
+#endif
+
+	return 0;
+}
+
+int board_late_init(void)
+{
+	setup_board_eeprom_env();
+	setup_serial();
+
+	/* Check for and probe any plugged-in daughtercards */
+	probe_daughtercards();
+
+	return 0;
+}
+
+void spl_board_init(void)
+{
+	probe_daughtercards();
+}