diff options
author | Jon Loeliger <jdl@freescale.com> | 2008-08-26 15:01:36 -0500 |
---|---|---|
committer | Wolfgang Denk <wd@denx.de> | 2008-08-27 02:06:03 +0200 |
commit | 39aa1a73483e1ac2bd56d5523abfc3970ee82c77 (patch) | |
tree | 7f28b02f7c1eaf149f27a8a53efc60976eb0c572 /board | |
parent | 6a8e5692933e8e6d6e5ba7e594f49dd6d4c3a263 (diff) |
FSL DDR: Convert MPC8610HPCD to new DDR code.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board')
-rw-r--r-- | board/freescale/mpc8610hpcd/Makefile | 10 | ||||
-rw-r--r-- | board/freescale/mpc8610hpcd/ddr.c | 79 | ||||
-rw-r--r-- | board/freescale/mpc8610hpcd/mpc8610hpcd.c | 3 |
3 files changed, 86 insertions, 6 deletions
diff --git a/board/freescale/mpc8610hpcd/Makefile b/board/freescale/mpc8610hpcd/Makefile index a457c32e86..930a2063ab 100644 --- a/board/freescale/mpc8610hpcd/Makefile +++ b/board/freescale/mpc8610hpcd/Makefile @@ -23,14 +23,14 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a -COBJS := $(BOARD).o law.o +COBJS-y += $(BOARD).o +COBJS-$(CONFIG_FSL_DDR2) += ddr.o +COBJS-y += law.o COBJS-${CONFIG_FSL_DIU_FB} += mpc8610hpcd_diu.o -COBJS += ${COBJS-y} - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) SOBJS := $(addprefix $(obj),$(SOBJS)) $(LIB): $(obj).depend $(OBJS) $(SOBJS) diff --git a/board/freescale/mpc8610hpcd/ddr.c b/board/freescale/mpc8610hpcd/ddr.c new file mode 100644 index 0000000000..2d22da1777 --- /dev/null +++ b/board/freescale/mpc8610hpcd/ddr.c @@ -0,0 +1,79 @@ +/* + * Copyright 2008 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * Version 2 as published by the Free Software Foundation. + */ + +#include <common.h> +#include <i2c.h> + +#include <asm/fsl_ddr_sdram.h> + +static void +get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address) +{ + i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t)); +} + +unsigned int fsl_ddr_get_mem_data_rate(void) +{ + return get_bus_freq(0); +} + +void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd, + unsigned int ctrl_num) +{ + unsigned int i; + unsigned int i2c_address = 0; + + for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) { + if (ctrl_num == 0 && i == 0) { + i2c_address = SPD_EEPROM_ADDRESS1; + } + get_spd(&(ctrl_dimms_spd[i]), i2c_address); + } +} + +void fsl_ddr_board_options(memctl_options_t *popts, unsigned int ctrl_num) +{ + /* + * Factors to consider for clock adjust: + * - number of chips on bus + * - position of slot + * - DDR1 vs. DDR2? + * - ??? + * + * This needs to be determined on a board-by-board basis. + * 0110 3/4 cycle late + * 0111 7/8 cycle late + */ + popts->clk_adjust = 7; + + /* + * Factors to consider for CPO: + * - frequency + * - ddr1 vs. ddr2 + */ + popts->cpo_override = 10; + + /* + * Factors to consider for write data delay: + * - number of DIMMs + * + * 1 = 1/4 clock delay + * 2 = 1/2 clock delay + * 3 = 3/4 clock delay + * 4 = 1 clock delay + * 5 = 5/4 clock delay + * 6 = 3/2 clock delay + */ + popts->write_data_delay = 3; + + /* + * Factors to consider for half-strength driver enable: + * - number of DIMMs installed + */ + popts->half_strength_driver_enable = 0; +} diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c index ff1b892b51..c9dde4d1a3 100644 --- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c +++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c @@ -26,6 +26,7 @@ #include <asm/processor.h> #include <asm/immap_86xx.h> #include <asm/immap_fsl_pci.h> +#include <asm/fsl_ddr_sdram.h> #include <i2c.h> #include <asm/io.h> #include <libfdt.h> @@ -122,7 +123,7 @@ initdram(int board_type) long dram_size = 0; #if defined(CONFIG_SPD_EEPROM) - dram_size = spd_sdram(); + dram_size = fsl_ddr_sdram(); #else dram_size = fixed_sdram(); #endif |