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authorFabio Estevam <fabio.estevam@freescale.com>2014-04-11 17:43:53 -0300
committerStefano Babic <sbabic@denx.de>2014-04-28 14:02:39 +0200
commit3b31605aef069d183a9d0c1e3aa6f957503cd56b (patch)
treeac513e3b094dfb4665c1349a1dbb7248590e35c8 /board
parent694c3bc107c61b900e3e0a09dd8f0346b1b7685f (diff)
nitrogen6x: Fix the PAD settings for the ECSPI chipselect
ECSPI chipselect (MX6_PAD_EIM_D19__GPIO3_IO19) is used with GPIO functionality, so it does not make sense to set its pad as SPI pin. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Eric Nelson <eric.nelson@boundarydevices.com>
Diffstat (limited to 'board')
-rw-r--r--board/boundary/nitrogen6x/nitrogen6x.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/board/boundary/nitrogen6x/nitrogen6x.c b/board/boundary/nitrogen6x/nitrogen6x.c
index 8475653e51..84294db859 100644
--- a/board/boundary/nitrogen6x/nitrogen6x.c
+++ b/board/boundary/nitrogen6x/nitrogen6x.c
@@ -330,7 +330,7 @@ int board_mmc_init(bd_t *bis)
#ifdef CONFIG_MXC_SPI
iomux_v3_cfg_t const ecspi1_pads[] = {
/* SS1 */
- MX6_PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(SPI_PAD_CTRL),
+ MX6_PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL),
MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
MX6_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL),
MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),