Merge tag 'u-boot-imx-20190612' of git://git.denx.de/u-boot-imx

u-boot-imx-20190612
--------------------

- Board fixes:
	- imx6logic
	- wandboard
	- mx6sabre boots again
	- imx8qm_mek
	- pico-* boards
	- Toradex apalis / colibri
	- engicam imx6 (environment)
	- KP MX53
	- opos6ul
- Switch to DM:
	- vining2000
	- dh MX6
	- Toradex colibri i.MX7
	- Novena
- Security : fix CSF size for HAB
- Other:
      - imx: fix building for i.mx8 without spl
      - pcie and switch to DM

      mx6sabreauto: Enable SPL SDP support

35 files changed, 782 insertions, 345 deletions

diff --git a/board/armadeus/opos6uldev/board.c b/board/armadeus/opos6uldev/board.c
index 4faa997126..aed334f8fb 100644
--- a/board/armadeus/opos6uldev/board.c
+++ b/board/armadeus/opos6uldev/board.c
@@ -3,7 +3,6 @@
  * Copyright (C) 2018 Armadeus Systems
  */
 
-#include <asm/arch/clock.h>
 #include <asm/arch/mx6-pins.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
@@ -49,8 +48,6 @@ int setup_lcd(void)
 	struct gpio_desc backlight;
 	int ret;
 
-	enable_lcdif_clock(LCDIF1_BASE_ADDR, 1);
-
 	imx_iomux_v3_setup_multiple_pads(lcd_pads, ARRAY_SIZE(lcd_pads));
 
 	/* Set Brightness to high */
diff --git a/board/dhelectronics/dh_imx6/dh_imx6.c b/board/dhelectronics/dh_imx6/dh_imx6.c
index f9ac5c10e1..50e3cb50a3 100644
--- a/board/dhelectronics/dh_imx6/dh_imx6.c
+++ b/board/dhelectronics/dh_imx6/dh_imx6.c
@@ -6,6 +6,8 @@
  */
 
 #include <common.h>
+#include <dm.h>
+#include <dm/device-internal.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/crm_regs.h>
 #include <asm/arch/imx-regs.h>
@@ -18,6 +20,8 @@
 #include <asm/mach-imx/iomux-v3.h>
 #include <asm/mach-imx/mxc_i2c.h>
 #include <asm/mach-imx/sata.h>
+#include <ahci.h>
+#include <dwc_ahsata.h>
 #include <environment.h>
 #include <errno.h>
 #include <fsl_esdhc.h>
@@ -167,6 +171,9 @@ int board_eth_init(bd_t *bis)
 	struct mii_dev *bus = NULL;
 	struct phy_device *phydev = NULL;
 
+	gpio_request(IMX_GPIO_NR(5, 0), "PHY-reset");
+	gpio_request(IMX_GPIO_NR(1, 7), "VIO");
+
 	setup_fec_clock();
 
 	eth_phy_reset();
@@ -186,64 +193,10 @@ int board_eth_init(bd_t *bis)
 }
 #endif
 
-#ifdef CONFIG_FSL_ESDHC
-
-#define USDHC2_CD_GPIO	IMX_GPIO_NR(6, 16)
-#define USDHC3_CD_GPIO	IMX_GPIO_NR(7, 8)
-
-static struct fsl_esdhc_cfg usdhc_cfg[3] = {
-	{ USDHC2_BASE_ADDR },
-	{ USDHC3_BASE_ADDR },
-	{ USDHC4_BASE_ADDR },
-};
-
-int board_mmc_getcd(struct mmc *mmc)
-{
-	struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
-
-	switch (cfg->esdhc_base) {
-	case USDHC2_BASE_ADDR:
-		return gpio_get_value(USDHC2_CD_GPIO);
-	case USDHC3_BASE_ADDR:
-		return !gpio_get_value(USDHC3_CD_GPIO);
-	case USDHC4_BASE_ADDR:
-		return 1; /* eMMC/uSDHC4 is always present */
-	}
-
-	return 0;
-}
-
-int board_mmc_init(bd_t *bis)
-{
-	int i, ret;
-
-	/*
-	 * According to the board_mmc_init() the following map is done:
-	 * (U-Boot device node)    (Physical Port)
-	 * mmc0                    SD interface
-	 * mmc1                    micro SD
-	 * mmc2                    eMMC
-	 */
-	gpio_direction_input(USDHC2_CD_GPIO);
-	gpio_direction_input(USDHC3_CD_GPIO);
-
-	usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
-	usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
-	usdhc_cfg[2].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
-
-	for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
-		ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
-}
-#endif
-
 #ifdef CONFIG_USB_EHCI_MX6
 static void setup_usb(void)
 {
+	gpio_request(IMX_GPIO_NR(3, 31), "USB-VBUS");
 	/*
 	 * Set daisy chain for otg_pin_id on MX6Q.
 	 * For MX6DL, this bit is reserved.
@@ -319,16 +272,6 @@ int board_early_init_f(void)
 	return 0;
 }
 
-#ifdef CONFIG_MXC_SPI
-int board_spi_cs_gpio(unsigned bus, unsigned cs)
-{
-	if (bus == 0 && cs == 0)
-		return IMX_GPIO_NR(2, 30);
-	else
-		return -1;
-}
-#endif
-
 int board_init(void)
 {
 	struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
@@ -351,10 +294,6 @@ int board_init(void)
 	}
 #endif
 
-#ifdef CONFIG_SATA
-	setup_sata();
-#endif
-
 	setup_dhcom_mac_from_fuse();
 
 	return 0;
@@ -379,6 +318,10 @@ static int board_get_hwcode(void)
 {
 	int hw_code;
 
+	gpio_request(HW_CODE_BIT_0, "HW-code-bit-0");
+	gpio_request(HW_CODE_BIT_1, "HW-code-bit-1");
+	gpio_request(HW_CODE_BIT_2, "HW-code-bit-2");
+
 	gpio_direction_input(HW_CODE_BIT_0);
 	gpio_direction_input(HW_CODE_BIT_1);
 	gpio_direction_input(HW_CODE_BIT_2);
diff --git a/board/freescale/imx8mq_evk/spl.c b/board/freescale/imx8mq_evk/spl.c
index e6cbc34b0d..3c0ff0bb1b 100644
--- a/board/freescale/imx8mq_evk/spl.c
+++ b/board/freescale/imx8mq_evk/spl.c
@@ -27,7 +27,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 extern struct dram_timing_info dram_timing_b0;
 
-void spl_dram_init(void)
+static void spl_dram_init(void)
 {
 	/* ddr init */
 	if ((get_cpu_rev() & 0xfff) == CHIP_REV_2_1)
@@ -38,7 +38,7 @@ void spl_dram_init(void)
 
 #define I2C_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE)
 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
-struct i2c_pads_info i2c_pad_info1 = {
+static struct i2c_pads_info i2c_pad_info1 = {
 	.scl = {
 		.i2c_mode = IMX8MQ_PAD_I2C1_SCL__I2C1_SCL | PC,
 		.gpio_mode = IMX8MQ_PAD_I2C1_SCL__GPIO5_IO14 | PC,
diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c
index 385a18e923..cdfc5ff77f 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -287,49 +287,6 @@ int board_mmc_getcd(struct mmc *mmc)
 
 int board_mmc_init(bd_t *bis)
 {
-#ifndef CONFIG_SPL_BUILD
-	int ret;
-	int i;
-
-	/*
-	 * According to the board_mmc_init() the following map is done:
-	 * (U-Boot device node)    (Physical Port)
-	 * mmc0                    SD2
-	 * mmc1                    SD3
-	 * mmc2                    eMMC
-	 */
-	for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
-		switch (i) {
-		case 0:
-			SETUP_IOMUX_PADS(usdhc2_pads);
-			gpio_request(USDHC2_CD_GPIO, "USDHC2 CD");
-			gpio_direction_input(USDHC2_CD_GPIO);
-			usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
-			break;
-		case 1:
-			SETUP_IOMUX_PADS(usdhc3_pads);
-			gpio_request(USDHC3_CD_GPIO, "USDHC3 CD");
-			gpio_direction_input(USDHC3_CD_GPIO);
-			usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
-			break;
-		case 2:
-			SETUP_IOMUX_PADS(usdhc4_pads);
-			usdhc_cfg[2].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
-			break;
-		default:
-			printf("Warning: you configured more USDHC controllers"
-			       "(%d) then supported by the board (%d)\n",
-			       i + 1, CONFIG_SYS_FSL_USDHC_NUM);
-			return -EINVAL;
-		}
-
-		ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
-#else
 	struct src *psrc = (struct src *)SRC_BASE_ADDR;
 	unsigned reg = readl(&psrc->sbmr1) >> 11;
 	/*
@@ -363,7 +320,6 @@ int board_mmc_init(bd_t *bis)
 	}
 
 	return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
-#endif
 }
 #endif
 
diff --git a/board/kosagi/novena/novena.c b/board/kosagi/novena/novena.c
index 9f2586521d..78294b820e 100644
--- a/board/kosagi/novena/novena.c
+++ b/board/kosagi/novena/novena.c
@@ -6,6 +6,9 @@
  */
 
 #include <common.h>
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <ahci.h>
 #include <linux/errno.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
@@ -20,6 +23,7 @@
 #include <asm/mach-imx/mxc_i2c.h>
 #include <asm/mach-imx/sata.h>
 #include <asm/mach-imx/video.h>
+#include <dwc_ahsata.h>
 #include <environment.h>
 #include <fsl_esdhc.h>
 #include <i2c.h>
@@ -35,6 +39,7 @@
 #include <power/pmic.h>
 #include <power/pfuze100_pmic.h>
 #include <stdio_dev.h>
+#include <video_console.h>
 
 #include "novena.h"
 
@@ -83,6 +88,8 @@ int drv_keyboard_init(void)
 		.tstc	= novena_gpio_button_tstc,
 	};
 
+	gpio_request(NOVENA_BUTTON_GPIO, "button");
+
 	error = input_init(&button_input, 0);
 	if (error) {
 		debug("%s: Cannot set up input\n", __func__);
@@ -99,60 +106,6 @@ int drv_keyboard_init(void)
 }
 #endif
 
-/*
- * SDHC
- */
-#ifdef CONFIG_FSL_ESDHC
-static struct fsl_esdhc_cfg usdhc_cfg[] = {
-	{ USDHC3_BASE_ADDR, 0, 4 },	/* Micro SD */
-	{ USDHC2_BASE_ADDR, 0, 4 },	/* Big SD */
-};
-
-int board_mmc_getcd(struct mmc *mmc)
-{
-	struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
-
-	/* There is no CD for a microSD card, assume always present. */
-	if (cfg->esdhc_base == USDHC3_BASE_ADDR)
-		return 1;
-	else
-		return !gpio_get_value(NOVENA_SD_CD);
-}
-
-int board_mmc_getwp(struct mmc *mmc)
-{
-	struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
-
-	/* There is no WP for a microSD card, assume always read-write. */
-	if (cfg->esdhc_base == USDHC3_BASE_ADDR)
-		return 0;
-	else
-		return gpio_get_value(NOVENA_SD_WP);
-}
-
-
-int board_mmc_init(bd_t *bis)
-{
-	s32 status = 0;
-	int index;
-
-	usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
-	usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
-
-	/* Big SD write-protect and card-detect */
-	gpio_direction_input(NOVENA_SD_WP);
-	gpio_direction_input(NOVENA_SD_CD);
-
-	for (index = 0; index < ARRAY_SIZE(usdhc_cfg); index++) {
-		status = fsl_esdhc_initialize(bis, &usdhc_cfg[index]);
-		if (status)
-			return status;
-	}
-
-	return status;
-}
-#endif
-
 int board_early_init_f(void)
 {
 #if defined(CONFIG_VIDEO_IPUV3)
@@ -167,17 +120,25 @@ int board_init(void)
 	/* address of boot parameters */
 	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 
-#ifdef CONFIG_SATA
-	setup_sata();
-#endif
-
 	return 0;
 }
 
 int board_late_init(void)
 {
 #if defined(CONFIG_VIDEO_IPUV3)
+	struct udevice *con;
+	char buf[DISPLAY_OPTIONS_BANNER_LENGTH];
+	int ret;
+
 	setup_display_lvds();
+
+	ret = uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con);
+	if (ret)
+		return ret;
+
+	display_options_get_banner(false, buf, sizeof(buf));
+	vidconsole_position_cursor(con, 0, 0);
+	vidconsole_put_string(con, buf);
 #endif
 	return 0;
 }
diff --git a/board/kosagi/novena/video.c b/board/kosagi/novena/video.c
index f1351b9e28..7083b6e103 100644
--- a/board/kosagi/novena/video.c
+++ b/board/kosagi/novena/video.c
@@ -270,6 +270,7 @@ static void enable_lvds(struct display_info_t const *dev)
 		return;
 
 	/* ITE IT6251 power enable. */
+	gpio_request(NOVENA_ITE6251_PWR_GPIO, "ite6251-power");
 	gpio_direction_output(NOVENA_ITE6251_PWR_GPIO, 0);
 	mdelay(10);
 	gpio_direction_output(NOVENA_ITE6251_PWR_GPIO, 1);
@@ -447,6 +448,8 @@ void setup_display_lvds(void)
 	/* Init the LVDS-to-eDP chip and if it succeeded, enable backlight. */
 	ret = it6251_init();
 	if (!ret) {
+		gpio_request(NOVENA_BACKLIGHT_PWR_GPIO, "backlight-power");
+		gpio_request(NOVENA_BACKLIGHT_PWM_GPIO, "backlight-pwm");
 		/* Backlight power enable. */
 		gpio_direction_output(NOVENA_BACKLIGHT_PWR_GPIO, 1);
 		/* PWM backlight pin, always on for full brightness. */
diff --git a/board/logicpd/imx6/imx6logic.c b/board/logicpd/imx6/imx6logic.c
index b17a3b1d39..53e609e15c 100644
--- a/board/logicpd/imx6/imx6logic.c
+++ b/board/logicpd/imx6/imx6logic.c
@@ -152,7 +152,8 @@ int board_late_init(void)
 
 	if (is_mx6dq()) {
 		env_set("board_rev", "MX6DQ");
-		env_set("fdt_file", "imx6q-logicpd.dtb");
+		if (!env_get("fdt_file"))
+			env_set("fdt_file", "imx6q-logicpd.dtb");
 	}
 
 	return 0;
diff --git a/board/phytec/pcl063/Kconfig b/board/phytec/pcl063/Kconfig
index 977db70f64..58f72f2791 100644
--- a/board/phytec/pcl063/Kconfig
+++ b/board/phytec/pcl063/Kconfig
@@ -10,3 +10,16 @@ config SYS_CONFIG_NAME
 	default "pcl063"
 
 endif
+
+if TARGET_PCL063_ULL
+
+config SYS_BOARD
+	default "pcl063"
+
+config SYS_VENDOR
+	default "phytec"
+
+config SYS_CONFIG_NAME
+	default "pcl063_ull"
+
+endif
diff --git a/board/phytec/pcl063/MAINTAINERS b/board/phytec/pcl063/MAINTAINERS
index c65a951f3d..710b9680d4 100644
--- a/board/phytec/pcl063/MAINTAINERS
+++ b/board/phytec/pcl063/MAINTAINERS
@@ -1,8 +1,14 @@
 PCL063 BOARD
 M:	Martyn Welch <martyn.welch@collabora.com>
+M:	Parthiban Nallathambi <parthitce@gmail.com>
 S:	Maintained
 F:	arch/arm/dts/imx6ul-pcl063.dtsi
 F:	arch/arm/dts/imx6ul-phycore-segin.dts
+F:	arch/arm/dts/imx6ull-phycore-segin.dts
+F:	arch/arm/dts/pcl063-common.dtsi
+F:	arch/arm/dts/imx6ull-u-boot.dtsi
 F:	board/phytec/pcl063/
 F:	configs/phycore_pcl063_defconfig
+F:	configs/phycore_pcl063_ull_defconfig
 F:	include/configs/pcl063.h
+F:	include/configs/pcl063_ull.h
diff --git a/board/phytec/pcl063/pcl063.c b/board/phytec/pcl063/pcl063.c
index 38b233d1b0..17012df037 100644
--- a/board/phytec/pcl063/pcl063.c
+++ b/board/phytec/pcl063/pcl063.c
@@ -200,7 +200,10 @@ int board_init(void)
 
 int checkboard(void)
 {
-	puts("Board: PHYTEC phyCORE-i.MX6UL\n");
+	u32 cpurev = get_cpu_rev();
+
+	printf("Board: PHYTEC phyCORE-i.MX%s\n",
+	      get_imx_type((cpurev & 0xFF000) >> 12));
 
 	return 0;
 }
diff --git a/board/phytec/pcl063/spl.c b/board/phytec/pcl063/spl.c
index b93cd493f2..73a774645d 100644
--- a/board/phytec/pcl063/spl.c
+++ b/board/phytec/pcl063/spl.c
@@ -13,6 +13,7 @@
 #include <asm/arch/mx6-ddr.h>
 #include <asm/arch/mx6-pins.h>
 #include <asm/arch/crm_regs.h>
+#include <asm/arch/sys_proto.h>
 #include <fsl_esdhc.h>
 
 /* Configuration for Micron MT41K256M16TW-107 IT:P, 32M x 16 x 8 -> 256MiB */
@@ -117,11 +118,32 @@ static iomux_v3_cfg_t const usdhc1_pads[] = {
 	MX6_PAD_UART1_RTS_B__USDHC1_CD_B | MUX_PAD_CTRL(USDHC_PAD_CTRL),
 };
 
+#ifndef CONFIG_NAND_MXS
+static iomux_v3_cfg_t const usdhc2_pads[] = {
+	MX6_PAD_NAND_RE_B__USDHC2_CLK    | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	MX6_PAD_NAND_WE_B__USDHC2_CMD    | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	MX6_PAD_NAND_DATA00__USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	MX6_PAD_NAND_DATA01__USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	MX6_PAD_NAND_DATA02__USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	MX6_PAD_NAND_DATA03__USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	MX6_PAD_NAND_DATA04__USDHC2_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	MX6_PAD_NAND_DATA05__USDHC2_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	MX6_PAD_NAND_DATA06__USDHC2_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	MX6_PAD_NAND_DATA07__USDHC2_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+};
+#endif
+
 static struct fsl_esdhc_cfg usdhc_cfg[] = {
 	{
 		.esdhc_base = USDHC1_BASE_ADDR,
 		.max_bus_width = 4,
 	},
+#ifndef CONFIG_NAND_MXS
+	{
+		.esdhc_base = USDHC2_BASE_ADDR,
+		.max_bus_width = 8,
+	},
+#endif
 };
 
 int board_mmc_getcd(struct mmc *mmc)
@@ -131,12 +153,58 @@ int board_mmc_getcd(struct mmc *mmc)
 
 int board_mmc_init(bd_t *bis)
 {
-	imx_iomux_v3_setup_multiple_pads(usdhc1_pads, ARRAY_SIZE(usdhc1_pads));
-	usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
-
-	return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
+	int i, ret;
+
+	for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
+		switch (i) {
+		case 0:
+			SETUP_IOMUX_PADS(usdhc1_pads);
+			usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+			break;
+#ifndef CONFIG_NAND_MXS
+		case 1:
+			SETUP_IOMUX_PADS(usdhc2_pads);
+			usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+			break;
+#endif
+		default:
+			printf("Warning - USDHC%d controller not supporting\n",
+			       i + 1);
+			return 0;
+		}
+
+		ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
+		if (ret) {
+			printf("Warning: failed to initialize mmc dev %d\n", i);
+			return ret;
+		}
+	}
+
+	return 0;
 }
 
+void board_boot_order(u32 *spl_boot_list)
+{
+	u32 bmode = imx6_src_get_boot_mode();
+	u8 boot_dev = BOOT_DEVICE_MMC1;
+
+	switch ((bmode & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) {
+	case IMX6_BMODE_SD:
+	case IMX6_BMODE_ESD:
+		boot_dev = BOOT_DEVICE_MMC1;
+		break;
+	case IMX6_BMODE_MMC:
+	case IMX6_BMODE_EMMC:
+		boot_dev = BOOT_DEVICE_MMC2;
+		break;
+	default:
+		/* Default - BOOT_DEVICE_MMC1 */
+		printf("Wrong board boot order\n");
+		break;
+	}
+
+	spl_boot_list[0] = boot_dev;
+}
 #endif /* CONFIG_FSL_ESDHC */
 
 void board_init_f(ulong dummy)
diff --git a/board/samtec/vining_2000/Kconfig b/board/softing/vining_2000/Kconfig
index 3447c27fa4..90d45a7f6e 100644
--- a/board/samtec/vining_2000/Kconfig
+++ b/board/softing/vining_2000/Kconfig
@@ -1,10 +1,10 @@
-if TARGET_SAMTEC_VINING_2000
+if TARGET_SOFTING_VINING_2000
 
 config SYS_BOARD
 	default "vining_2000"
 
 config SYS_VENDOR
-	default "samtec"
+	default "softing"
 
 config SYS_CONFIG_NAME
 	default "vining_2000"
diff --git a/board/samtec/vining_2000/MAINTAINERS b/board/softing/vining_2000/MAINTAINERS
index 027e52736f..0df78c6b95 100644
--- a/board/samtec/vining_2000/MAINTAINERS
+++ b/board/softing/vining_2000/MAINTAINERS
@@ -1,6 +1,6 @@
 VINING_2000 BOARD
-M:	Ingo Schroeck <open-source@samtec.de>
+M:	Silvio Fricke <open-source@softing.de>
 S:	Maintained
-F:	board/samtec/vining_2000/
+F:	board/softing/vining_2000/
 F:	include/configs/vining_2000.h
 F:	configs/vining_2000_defconfig
diff --git a/board/samtec/vining_2000/Makefile b/board/softing/vining_2000/Makefile
index 9650da711d..84f66a67b5 100644
--- a/board/samtec/vining_2000/Makefile
+++ b/board/softing/vining_2000/Makefile
@@ -1,4 +1,5 @@
 # SPDX-License-Identifier: GPL-2.0+
 # (C) Copyright 2016 samtec automotive software & electronics gmbh
+# Copyright (C) 2017-2019 softing automotive electronics gmbH
 
 obj-y  := vining_2000.o
diff --git a/board/samtec/vining_2000/imximage.cfg b/board/softing/vining_2000/imximage.cfg
index 3e4fcad8ea..f6f59ddf55 100644
--- a/board/samtec/vining_2000/imximage.cfg
+++ b/board/softing/vining_2000/imximage.cfg
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2016 samtec automotive software & electronics gmbh
+ * Copyright (C) 2017-2019 softing automotive electronics gmbH
  */
 
 #define __ASSEMBLY__
diff --git a/board/samtec/vining_2000/vining_2000.c b/board/softing/vining_2000/vining_2000.c
index f37365c5cb..19b9b37276 100644
--- a/board/samtec/vining_2000/vining_2000.c
+++ b/board/softing/vining_2000/vining_2000.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2016 samtec automotive software & electronics gmbh
+ * Copyright (C) 2017-2019 softing automotive electronics gmbH
  *
  * Author: Christoph Fritz <chf.fritz@googlemail.com>
  */
@@ -57,6 +58,9 @@ DECLARE_GLOBAL_DATA_PTR;
 	PAD_CTL_PKE |  PAD_CTL_SPEED_MED | PAD_CTL_DSE_80ohm |	\
 	PAD_CTL_SRE_FAST)
 
+#define USDHC_RESET_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_47K_UP |	\
+	PAD_CTL_PKE |  PAD_CTL_SPEED_MED | PAD_CTL_DSE_80ohm)
+
 #define GPIO_PAD_CTRL  (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP |	\
 	PAD_CTL_PKE)
 
@@ -67,34 +71,6 @@ int dram_init(void)
 	return 0;
 }
 
-static iomux_v3_cfg_t const uart1_pads[] = {
-	MX6_PAD_GPIO1_IO04__UART1_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-	MX6_PAD_GPIO1_IO05__UART1_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
-static iomux_v3_cfg_t const usdhc2_pads[] = {
-	MX6_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(USDHC_CLK_PAD_CTRL),
-	MX6_PAD_SD2_CMD__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_SD2_DATA0__USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_SD2_DATA1__USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_SD2_DATA2__USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_SD2_DATA3__USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_LCD1_VSYNC__GPIO3_IO_28 | MUX_PAD_CTRL(GPIO_PAD_CTRL),
-};
-
-static iomux_v3_cfg_t const usdhc4_pads[] = {
-	MX6_PAD_SD4_CLK__USDHC4_CLK | MUX_PAD_CTRL(USDHC_CLK_PAD_CTRL),
-	MX6_PAD_SD4_CMD__USDHC4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_SD4_DATA0__USDHC4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_SD4_DATA1__USDHC4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_SD4_DATA2__USDHC4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_SD4_DATA3__USDHC4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_SD4_DATA4__USDHC4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_SD4_DATA5__USDHC4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_SD4_DATA6__USDHC4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_SD4_DATA7__USDHC4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-};
-
 static iomux_v3_cfg_t const fec1_pads[] = {
 	MX6_PAD_ENET1_MDC__ENET1_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),
 	MX6_PAD_ENET1_MDIO__ENET1_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL),
@@ -116,11 +92,6 @@ static iomux_v3_cfg_t const pwm_led_pads[] = {
 	MX6_PAD_RGMII2_RD3__PWM1_OUT | MUX_PAD_CTRL(NO_PAD_CTRL), /* blue */
 };
 
-static void setup_iomux_uart(void)
-{
-	imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
-}
-
 #define PHY_RESET IMX_GPIO_NR(5, 9)
 
 int board_eth_init(bd_t *bis)
@@ -152,6 +123,7 @@ int board_eth_init(bd_t *bis)
 		goto eth_fail;
 
 	/* reset phy */
+	gpio_request(PHY_RESET, "PHY-reset");
 	gpio_direction_output(PHY_RESET, 0);
 	mdelay(16);
 	gpio_set_value(PHY_RESET, 1);
@@ -437,66 +409,11 @@ int board_late_init(void)
 
 int board_early_init_f(void)
 {
-	setup_iomux_uart();
-
 	setup_iomux_usb();
 
 	return 0;
 }
 
-static struct fsl_esdhc_cfg usdhc_cfg[2] = {
-	{USDHC4_BASE_ADDR, 0, 8},
-	{USDHC2_BASE_ADDR, 0, 4},
-};
-
-#define USDHC2_CD_GPIO IMX_GPIO_NR(3, 28)
-
-int board_mmc_getcd(struct mmc *mmc)
-{
-	struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
-
-	if (cfg->esdhc_base == USDHC4_BASE_ADDR)
-		return 1;
-	if (cfg->esdhc_base == USDHC2_BASE_ADDR)
-		return !gpio_get_value(USDHC2_CD_GPIO);
-
-	return -EINVAL;
-}
-
-int board_mmc_init(bd_t *bis)
-{
-	int ret;
-
-	/*
-	 * According to the board_mmc_init() the following map is done:
-	 * (U-Boot device node)    (Physical Port)
-	 * mmc0                    USDHC4
-	 * mmc1                    USDHC2
-	 */
-	imx_iomux_v3_setup_multiple_pads(
-		usdhc4_pads, ARRAY_SIZE(usdhc4_pads));
-	usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
-
-	imx_iomux_v3_setup_multiple_pads(
-		usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
-	gpio_direction_input(USDHC2_CD_GPIO);
-	usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
-
-	ret = fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
-	if (ret) {
-		printf("Warning: failed to initialize USDHC4\n");
-		return ret;
-	}
-
-	ret = fsl_esdhc_initialize(bis, &usdhc_cfg[1]);
-	if (ret) {
-		printf("Warning: failed to initialize USDHC2\n");
-		return ret;
-	}
-
-	return 0;
-}
-
 int board_init(void)
 {
 	/* Address of boot parameters */
diff --git a/board/technexion/pico-imx6ul/MAINTAINERS b/board/technexion/pico-imx6ul/MAINTAINERS
index b8f3d24a53..e9b5a97090 100644
--- a/board/technexion/pico-imx6ul/MAINTAINERS
+++ b/board/technexion/pico-imx6ul/MAINTAINERS
@@ -5,13 +5,6 @@ S:	Maintained
 F:	board/technexion/pico-imx6ul/
 F:	include/configs/pico-imx6ul.h
 F:	configs/pico-imx6ul_defconfig
-
-TechNexion PICO-HOBBIT-IMX6UL
-M:	Otavio Salvador <otavio@ossystems.com.br>
-S:	Maintained
+F:	configs/pico-dwarf-imx6ul_defconfig
 F:	configs/pico-hobbit-imx6ul_defconfig
-
-TechNexion PICO-PI-IMX6UL
-M:	Otavio Salvador <otavio@ossystems.com.br>
-S:	Maintained
 F:	configs/pico-pi-imx6ul_defconfig
diff --git a/board/technexion/pico-imx7d/MAINTAINERS b/board/technexion/pico-imx7d/MAINTAINERS
index f9a1dfc05e..6e7316be9f 100644
--- a/board/technexion/pico-imx7d/MAINTAINERS
+++ b/board/technexion/pico-imx7d/MAINTAINERS
@@ -1,16 +1,10 @@
 TechNexion PICO-IMX7D board
 M:	Vanessa Maegima <vanessa.maegima@nxp.com>
+M:	Otavio Salvador <otavio@ossystems.com.br>
 S:	Maintained
 F:	board/technexion/pico-imx7d/
 F:	include/configs/pico-imx7d.h
 F:	configs/pico-imx7d_defconfig
-
-TechNexion PICO-HOBBIT-IMX7
-M:	Otavio Salvador <otavio@ossystems.com.br>
-S:	Maintained
+F:	configs/pico-imx7d_bl33_defconfig
 F:	configs/pico-hobbit-imx7d_defconfig
-
-TechNexion PICO-PI-IMX7
-M:	Otavio Salvador <otavio@ossystems.com.br>
-S:	Maintained
 F:	configs/pico-pi-imx7d_defconfig
diff --git a/board/technexion/pico-imx7d/README.pico-imx7d_BL33 b/board/technexion/pico-imx7d/README.pico-imx7d_BL33
new file mode 100644
index 0000000000..40324ffe5f
--- /dev/null
+++ b/board/technexion/pico-imx7d/README.pico-imx7d_BL33
@@ -0,0 +1,44 @@
+This document describes the instruction to build and flash ATF/OPTEE/U-Boot on
+pico-imx7d board. U-Boot is loaded as part of FIP image by ATF in this setup.
+The boot sequence is ATF -> OPTEE -> U-Boot -> Linux. U-Boot is in non-secure
+world in this case.
+
+- Build u-boot
+    Set environment variable of CROSS_COMPILE for your toolchain and ARCH=arm
+    $ make pico-imx7d_bl33_defconfig
+    $ make all
+
+- Download and build OPTEE
+    $ git clone git@github.com:OP-TEE/optee_os.git
+    $ make PLATFORM=imx PLATFORM_FLAVOR=mx7dpico_mbl CFG_BOOT_SECONDARY_REQUEST=y ARCH=arm
+
+- Download and build ATF
+    $ git clone https://git.linaro.org/landing-teams/working/mbl/arm-trusted-firmware.git -b linaro-imx7
+    $ make DEBUG=1 PLAT=picopi ARCH=aarch32 ARM_ARCH_MAJOR=7 \
+            CROSS_COMPILE=arm-linux-gnueabihf- LOG_LEVEL=50 V=1 \
+            CRASH_REPORTING=1 AARCH32_SP=optee all
+    Save file content in this link to file pico-imx7d.cfg:
+      http://git.linaro.org/landing-teams/working/mbl/u-boot.git/tree/board/technexion/pico-imx7d/pico-imx7d.cfg?h=linaro-imx
+    $ u-boot/tools/mkimage -n pico-imx7d.cfg -T imximage -e 0x9df00000 -d \
+            build/picopi/debug/bl2.bin bl2.imx
+
+- Create FIP image
+    Create a  fiptool_images/ folder in ATF folder, copy u-boot.bin in u-boot
+folder and tee*.bin in optee out/arm-plat-imx/core/tee/ folder to
+fiptool_images. Run below command in ATF folder to generate FIP image.
+    $ make -C tools/fiptool/
+    $ tools/fiptool/fiptool create --tos-fw fiptool_images/tee-header_v2.bin \
+          --tos-fw-extra1 fiptool_images/tee-pager_v2.bin \
+          --tos-fw-extra2 fiptool_images/tee-pageable_v2.bin \
+          --nt-fw fiptool_images/u-boot.bin \
+          fip.bin
+
+- Burn the images to eMMC for test.
+    Run below command in atf folder:
+    $ dd if=build/picopi/debug/bl2.bin.imx of=/dev/disk/by-id/usb-<your device>  bs=1024 seek=1;sync
+    $ dd if=fip.bin of=/dev/disk/by-id/usb-<your device>  bs=1024 seek=1;sync
+
+- Test
+    Just boot up your board and wait for u-boot start up after ATF's log.
+    For booting Linux in FIT image, please reference the FIT files in
+    u-boot doc/uImage.FIT/ folder.
diff --git a/board/technexion/pico-imx7d/pico-imx7d.c b/board/technexion/pico-imx7d/pico-imx7d.c
index e63b19df6e..e3d75e549a 100644
--- a/board/technexion/pico-imx7d/pico-imx7d.c
+++ b/board/technexion/pico-imx7d/pico-imx7d.c
@@ -63,6 +63,11 @@ int dram_init(void)
 {
 	gd->ram_size = imx_ddr_size();
 
+	/* Subtract the defined OPTEE runtime firmware length */
+#ifdef CONFIG_OPTEE_TZDRAM_SIZE
+		gd->ram_size -= CONFIG_OPTEE_TZDRAM_SIZE;
+#endif
+
 	return 0;
 }
 
@@ -80,8 +85,11 @@ int power_init_board(void)
 
 	p = pmic_get("PFUZE3000");
 	ret = pmic_probe(p);
-	if (ret)
-		return ret;
+	if (ret) {
+		printf("Warning:  Cannot find PMIC PFUZE3000\n");
+		printf("\tPower consumption is not optimized.\n");
+		return 0;
+	}
 
 	pmic_reg_read(p, PFUZE3000_DEVICEID, &reg);
 	pmic_reg_read(p, PFUZE3000_REVID, &rev_id);
diff --git a/board/toradex/apalis-imx8/Kconfig b/board/toradex/apalis-imx8/Kconfig
new file mode 100644
index 0000000000..c680d63fa1
--- /dev/null
+++ b/board/toradex/apalis-imx8/Kconfig
@@ -0,0 +1,30 @@
+if TARGET_APALIS_IMX8
+
+config SYS_BOARD
+	default "apalis-imx8"
+
+config SYS_VENDOR
+	default "toradex"
+
+config SYS_CONFIG_NAME
+	default "apalis-imx8"
+
+config TDX_CFG_BLOCK
+	default y
+
+config TDX_HAVE_MMC
+	default y
+
+config TDX_CFG_BLOCK_DEV
+	default "0"
+
+config TDX_CFG_BLOCK_PART
+	default "1"
+
+# Toradex config block in eMMC, at the end of 1st "boot sector"
+config TDX_CFG_BLOCK_OFFSET
+	default "-512"
+
+source "board/toradex/common/Kconfig"
+
+endif
diff --git a/board/toradex/apalis-imx8/MAINTAINERS b/board/toradex/apalis-imx8/MAINTAINERS
new file mode 100644
index 0000000000..c9ac58b47b
--- /dev/null
+++ b/board/toradex/apalis-imx8/MAINTAINERS
@@ -0,0 +1,9 @@
+Apalis iMX8
+M:	Marcel Ziswiler <marcel.ziswiler@toradex.com>
+W:	http://developer.toradex.com/software/linux/linux-software
+S:	Maintained
+F:	arch/arm/dts/fsl-imx8-apalis.dts
+F:	arch/arm/dts/fsl-imx8-apalis-u-boot.dtsi
+F:	board/toradex/apalis-imx8/
+F:	configs/apalis-imx8qm_defconfig
+F:	include/configs/apalis-imx8.h
diff --git a/board/toradex/apalis-imx8/Makefile b/board/toradex/apalis-imx8/Makefile
new file mode 100644
index 0000000000..a8c3eb7240
--- /dev/null
+++ b/board/toradex/apalis-imx8/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright 2019 Toradex
+#
+
+obj-y += apalis-imx8.o
diff --git a/board/toradex/apalis-imx8/README b/board/toradex/apalis-imx8/README
new file mode 100644
index 0000000000..e6e3dcb367
--- /dev/null
+++ b/board/toradex/apalis-imx8/README
@@ -0,0 +1,66 @@
+U-Boot for the Toradex Apalis iMX8QM V1.0B Module
+
+Quick Start
+===========
+
+- Build the ARM trusted firmware binary
+- Get scfw_tcm.bin and ahab-container.img
+- Build U-Boot
+- Load U-Boot binary using uuu
+- Flash U-Boot binary into the eMMC
+- Boot
+
+Get and Build the ARM Trusted Firmware
+======================================
+
+$ git clone -b imx_4.14.78_1.0.0_ga https://source.codeaurora.org/external/imx/imx-atf
+$ cd imx-atf/
+$ make PLAT=imx8qm bl31
+
+Get scfw_tcm.bin and ahab-container.img
+=======================================
+
+$ wget https://github.com/toradex/meta-fsl-bsp-release/blob/toradex-sumo-4.14.78-1.0.0_ga-bringup/imx/meta-bsp/recipes-bsp/imx-sc-firmware/files/mx8qm-apalis-scfw-tcm.bin?raw=true
+$ mv mx8qm-apalis-scfw-tcm.bin\?raw\=true mx8qm-apalis-scfw-tcm.bin
+$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.0.bin
+$ chmod +x firmware-imx-8.0.bin
+$ ./firmware-imx-8.0.bin
+
+Copy the following binaries to the U-Boot folder:
+
+$ cp imx-atf/build/imx8qm/release/bl31.bin .
+$ cp u-boot/u-boot.bin .
+
+Copy the following firmware to the U-Boot folder:
+
+$ cp firmware-imx-8.0/firmware/seco/ahab-container.img .
+
+Build U-Boot
+============
+
+$ make apalis-imx8qm_defconfig
+$ make u-boot-dtb.imx
+
+Load the U-Boot Binary Using UUU
+================================
+
+Get the latest version of the universal update utility (uuu) aka mfgtools 3.0:
+
+https://community.nxp.com/external-link.jspa?url=https%3A%2F%2Fgithub.com%2FNXPmicro%2Fmfgtools%2Freleases
+
+Put the module into USB recovery aka serial downloader mode, connect USB device
+to your host and execute uuu:
+
+sudo ./uuu u-boot/u-boot-dtb.imx
+
+Flash the U-Boot Binary into the eMMC
+=====================================
+
+Burn the u-boot-dtb.imx binary to the primary eMMC hardware boot area partition:
+
+load mmc 1:1 $loadaddr u-boot-dtb.imx
+setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt ${blkcnt} / 0x200
+mmc dev 0 1
+mmc write ${loadaddr} 0x0 ${blkcnt}
+
+Boot
diff --git a/board/toradex/apalis-imx8/apalis-imx8.c b/board/toradex/apalis-imx8/apalis-imx8.c
new file mode 100644
index 0000000000..f516e546a8
--- /dev/null
+++ b/board/toradex/apalis-imx8/apalis-imx8.c
@@ -0,0 +1,149 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019 Toradex
+ */
+
+#include <common.h>
+
+#include <asm/arch/clock.h>
+#include <asm/arch/imx8-pins.h>
+#include <asm/arch/iomux.h>
+#include <asm/arch/sci/sci.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+#include <environment.h>
+#include <errno.h>
+#include <linux/libfdt.h>
+
+#include "../common/tdx-cfg-block.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define UART_PAD_CTRL	((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \
+			 (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \
+			 (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \
+			 (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
+
+static iomux_cfg_t uart1_pads[] = {
+	SC_P_UART1_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
+	SC_P_UART1_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
+};
+
+static void setup_iomux_uart(void)
+{
+	imx8_iomux_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
+}
+
+int board_early_init_f(void)
+{
+	sc_pm_clock_rate_t rate;
+	sc_err_t err = 0;
+
+	/* Power up UART1 */
+	err = sc_pm_set_resource_power_mode(-1, SC_R_UART_1, SC_PM_PW_MODE_ON);
+	if (err != SC_ERR_NONE)
+		return 0;
+
+	/* Set UART3 clock root to 80 MHz */
+	rate = 80000000;
+	err = sc_pm_set_clock_rate(-1, SC_R_UART_1, SC_PM_CLK_PER, &rate);
+	if (err != SC_ERR_NONE)
+		return 0;
+
+	/* Enable UART1 clock root */
+	err = sc_pm_clock_enable(-1, SC_R_UART_1, SC_PM_CLK_PER, true, false);
+	if (err != SC_ERR_NONE)
+		return 0;
+
+	setup_iomux_uart();
+
+	return 0;
+}
+
+#if IS_ENABLED(CONFIG_DM_GPIO)
+static void board_gpio_init(void)
+{
+	/* TODO */
+}
+#else
+static inline void board_gpio_init(void) {}
+#endif
+
+#if IS_ENABLED(CONFIG_FEC_MXC)
+#include <miiphy.h>
+
+int board_phy_config(struct phy_device *phydev)
+{
+	if (phydev->drv->config)
+		phydev->drv->config(phydev);
+
+	return 0;
+}
+#endif
+
+void build_info(void)
+{
+	u32 sc_build = 0, sc_commit = 0;
+
+	/* Get SCFW build and commit id */
+	sc_misc_build_info(-1, &sc_build, &sc_commit);
+	if (!sc_build) {
+		printf("SCFW does not support build info\n");
+		sc_commit = 0; /* Display 0 if build info not supported */
+	}
+	printf("Build: SCFW %x\n", sc_commit);
+}
+
+int checkboard(void)
+{
+	puts("Model: Toradex Apalis iMX8\n");
+
+	build_info();
+	print_bootinfo();
+
+	return 0;
+}
+
+int board_init(void)
+{
+	board_gpio_init();
+
+	return 0;
+}
+
+void detail_board_ddr_info(void)
+{
+	puts("\nDDR    ");
+}
+
+/*
+ * Board specific reset that is system reset.
+ */
+void reset_cpu(ulong addr)
+{
+	/* TODO */
+}
+
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+int ft_board_setup(void *blob, bd_t *bd)
+{
+	return ft_common_board_setup(blob, bd);
+}
+#endif
+
+int board_mmc_get_env_dev(int devno)
+{
+	return devno;
+}
+
+int board_late_init(void)
+{
+#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
+/* TODO move to common */
+	env_set("board_name", "Apalis iMX8QM");
+	env_set("board_rev", "v1.0");
+#endif
+
+	return 0;
+}
diff --git a/board/toradex/apalis-imx8/apalis-imx8qm-imximage.cfg b/board/toradex/apalis-imx8/apalis-imx8qm-imximage.cfg
new file mode 100644
index 0000000000..71981f8c55
--- /dev/null
+++ b/board/toradex/apalis-imx8/apalis-imx8qm-imximage.cfg
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2019 Toradex
+ *
+ * Refer doc/README.imx8image for more details about how-to configure
+ * and create imx8image boot image
+ */
+
+#define __ASSEMBLY__
+
+/* Boot from SD, sector size 0x400 */
+BOOT_FROM EMMC_FASTBOOT 0x400
+/* SoC type IMX8QM */
+SOC_TYPE IMX8QM
+/* Append seco container image */
+APPEND mx8qm-ahab-container.img
+/* Create the 2nd container */
+CONTAINER
+/* Add scfw image with exec attribute */
+IMAGE SCU mx8qm-apalis-scfw-tcm.bin
+/* Add ATF image with exec attribute */
+IMAGE A35 bl31.bin 0x80000000
+/* Add U-Boot image with load attribute */
+DATA A35 u-boot-dtb.bin 0x80020000
diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c
index 3e59185438..b502d4ef13 100644
--- a/board/toradex/apalis_imx6/apalis_imx6.c
+++ b/board/toradex/apalis_imx6/apalis_imx6.c
@@ -1131,52 +1131,3 @@ U_BOOT_DEVICE(mxc_serial) = {
 	.name = "serial_mxc",
 	.platdata = &mxc_serial_plat,
 };
-
-#if CONFIG_IS_ENABLED(AHCI)
-static int sata_imx_probe(struct udevice *dev)
-{
-	int i, err;
-
-	for (i = 0; i < APALIS_IMX6_SATA_INIT_RETRIES; i++) {
-		err = setup_sata();
-		if (err) {
-			printf("SATA setup failed: %d\n", err);
-			return err;
-		}
-
-		udelay(100);
-
-		err = dwc_ahsata_probe(dev);
-		if (!err)
-			break;
-
-		/* There is no device on the SATA port */
-		if (sata_dm_port_status(0, 0) == 0)
-			break;
-
-		/* There's a device, but link not established. Retry */
-		device_remove(dev, DM_REMOVE_NORMAL);
-	}
-
-	return 0;
-}
-
-struct ahci_ops sata_imx_ops = {
-	.port_status = dwc_ahsata_port_status,
-	.reset	= dwc_ahsata_bus_reset,
-	.scan	= dwc_ahsata_scan,
-};
-
-static const struct udevice_id sata_imx_ids[] = {
-	{ .compatible = "fsl,imx6q-ahci" },
-	{ }
-};
-
-U_BOOT_DRIVER(sata_imx) = {
-	.name		= "dwc_ahci",
-	.id		= UCLASS_AHCI,
-	.of_match	= sata_imx_ids,
-	.ops		= &sata_imx_ops,
-	.probe		= sata_imx_probe,
-};
-#endif /* AHCI */
diff --git a/board/toradex/colibri-imx8x/Kconfig b/board/toradex/colibri-imx8x/Kconfig
new file mode 100644
index 0000000000..d97fed020e
--- /dev/null
+++ b/board/toradex/colibri-imx8x/Kconfig
@@ -0,0 +1,30 @@
+if TARGET_COLIBRI_IMX8X
+
+config SYS_BOARD
+	default "colibri-imx8x"
+
+config SYS_VENDOR
+	default "toradex"
+
+config SYS_CONFIG_NAME
+	default "colibri-imx8x"
+
+config TDX_CFG_BLOCK
+	default y
+
+config TDX_HAVE_MMC
+	default y
+
+config TDX_CFG_BLOCK_DEV
+	default "0"
+
+config TDX_CFG_BLOCK_PART
+	default "1"
+
+# Toradex config block in eMMC, at the end of 1st "boot sector"
+config TDX_CFG_BLOCK_OFFSET
+	default "-512"
+
+source "board/toradex/common/Kconfig"
+
+endif
diff --git a/board/toradex/colibri-imx8x/MAINTAINERS b/board/toradex/colibri-imx8x/MAINTAINERS
new file mode 100644
index 0000000000..e91b9975c2
--- /dev/null
+++ b/board/toradex/colibri-imx8x/MAINTAINERS
@@ -0,0 +1,9 @@
+Colibri iMX8X
+M:	Marcel Ziswiler <marcel.ziswiler@toradex.com>
+W:	http://developer.toradex.com/software/linux/linux-software
+S:	Maintained
+F:	arch/arm/dts/fsl-imx8x-colibri.dts
+F:	arch/arm/dts/fsl-imx8x-colibri-u-boot.dtsi
+F:	board/toradex/colibri-imx8x/
+F:	configs/colibri-imx8qxp_defconfig
+F:	include/configs/colibri-imx8x.h
diff --git a/board/toradex/colibri-imx8x/Makefile b/board/toradex/colibri-imx8x/Makefile
new file mode 100644
index 0000000000..e3945c8f15
--- /dev/null
+++ b/board/toradex/colibri-imx8x/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright 2019 Toradex
+#
+
+obj-y += colibri-imx8x.o
diff --git a/board/toradex/colibri-imx8x/README b/board/toradex/colibri-imx8x/README
new file mode 100644
index 0000000000..708bb3e51c
--- /dev/null
+++ b/board/toradex/colibri-imx8x/README
@@ -0,0 +1,66 @@
+U-Boot for the Toradex Colibri iMX8QXP V1.0B Module
+
+Quick Start
+===========
+
+- Build the ARM trusted firmware binary
+- Get scfw_tcm.bin and ahab-container.img
+- Build U-Boot
+- Load U-Boot binary using uuu
+- Flash U-Boot binary into the eMMC
+- Boot
+
+Get and Build the ARM Trusted Firmware
+======================================
+
+$ git clone -b imx_4.14.78_1.0.0_ga https://source.codeaurora.org/external/imx/imx-atf
+$ cd imx-atf/
+$ make PLAT=imx8qxp bl31
+
+Get scfw_tcm.bin and ahab-container.img
+=======================================
+
+$ wget https://github.com/toradex/meta-fsl-bsp-release/blob/toradex-sumo-4.14.78-1.0.0_ga-bringup/imx/meta-bsp/recipes-bsp/imx-sc-firmware/files/mx8qx-colibri-scfw-tcm.bin?raw=true
+$ mv mx8qx-colibri-scfw-tcm.bin\?raw\=true mx8qx-colibri-scfw-tcm.bin
+$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.0.bin
+$ chmod +x firmware-imx-8.0.bin
+$ ./firmware-imx-8.0.bin
+
+Copy the following binaries to the U-Boot folder:
+
+$ cp imx-atf/build/imx8qxp/release/bl31.bin .
+$ cp u-boot/u-boot.bin .
+
+Copy the following firmware to the U-Boot folder:
+
+$ cp firmware-imx-8.0/firmware/seco/ahab-container.img .
+
+Build U-Boot
+============
+
+$ make colibri-imx8qxp_defconfig
+$ make u-boot-dtb.imx
+
+Load the U-Boot Binary Using UUU
+================================
+
+Get the latest version of the universal update utility (uuu) aka mfgtools 3.0:
+
+https://community.nxp.com/external-link.jspa?url=https%3A%2F%2Fgithub.com%2FNXPmicro%2Fmfgtools%2Freleases
+
+Put the module into USB recovery aka serial downloader mode, connect USB device
+to your host and execute uuu:
+
+sudo ./uuu u-boot/u-boot-dtb.imx
+
+Flash the U-Boot Binary into the eMMC
+=====================================
+
+Burn the u-boot-dtb.imx binary to the primary eMMC hardware boot area partition:
+
+load mmc 1:1 $loadaddr u-boot-dtb.imx
+setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt ${blkcnt} / 0x200
+mmc dev 0 1
+mmc write ${loadaddr} 0x0 ${blkcnt}
+
+Boot
diff --git a/board/toradex/colibri-imx8x/colibri-imx8qxp-imximage.cfg b/board/toradex/colibri-imx8x/colibri-imx8qxp-imximage.cfg
new file mode 100644
index 0000000000..1dcd13271d
--- /dev/null
+++ b/board/toradex/colibri-imx8x/colibri-imx8qxp-imximage.cfg
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2019 Toradex
+ *
+ * Refer doc/README.imx8image for more details about how-to configure
+ * and create imx8image boot image
+ */
+
+#define __ASSEMBLY__
+
+/* Boot from SD, sector size 0x400 */
+BOOT_FROM EMMC_FASTBOOT 0x400
+/* SoC type IMX8QX */
+SOC_TYPE IMX8QX
+/* Append seco container image */
+APPEND mx8qx-ahab-container.img
+/* Create the 2nd container */
+CONTAINER
+/* Add scfw image with exec attribute */
+IMAGE SCU mx8qx-colibri-scfw-tcm.bin
+/* Add ATF image with exec attribute */
+IMAGE A35 bl31.bin 0x80000000
+/* Add U-Boot image with load attribute */
+DATA A35 u-boot-dtb.bin 0x80020000
diff --git a/board/toradex/colibri-imx8x/colibri-imx8x.c b/board/toradex/colibri-imx8x/colibri-imx8x.c
new file mode 100644
index 0000000000..aa8eaa0ea1
--- /dev/null
+++ b/board/toradex/colibri-imx8x/colibri-imx8x.c
@@ -0,0 +1,160 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019 Toradex
+ */
+
+#include <common.h>
+
+#include <asm/arch/clock.h>
+#include <asm/arch/imx8-pins.h>
+#include <asm/arch/iomux.h>
+#include <asm/arch/sci/sci.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+#include <environment.h>
+#include <errno.h>
+#include <linux/libfdt.h>
+
+#include "../common/tdx-cfg-block.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define UART_PAD_CTRL	((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \
+			 (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \
+			 (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \
+			 (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
+
+static iomux_cfg_t uart3_pads[] = {
+	SC_P_FLEXCAN2_RX | MUX_MODE_ALT(2) | MUX_PAD_CTRL(UART_PAD_CTRL),
+	SC_P_FLEXCAN2_TX | MUX_MODE_ALT(2) | MUX_PAD_CTRL(UART_PAD_CTRL),
+	/* Transceiver FORCEOFF# signal, mux to use pull-up */
+	SC_P_QSPI0B_DQS | MUX_MODE_ALT(4) | MUX_PAD_CTRL(UART_PAD_CTRL),
+};
+
+static void setup_iomux_uart(void)
+{
+	imx8_iomux_setup_multiple_pads(uart3_pads, ARRAY_SIZE(uart3_pads));
+}
+
+int board_early_init_f(void)
+{
+	sc_pm_clock_rate_t rate;
+	sc_err_t err = 0;
+
+	/*
+	 * This works around that having only UART3 up the baudrate is 1.2M
+	 * instead of 115.2k. Set UART0 clock root to 80 MHz
+	 */
+	rate = 80000000;
+	err = sc_pm_set_clock_rate(-1, SC_R_UART_0, SC_PM_CLK_PER, &rate);
+	if (err != SC_ERR_NONE)
+		return 0;
+
+	/* Power up UART3 */
+	err = sc_pm_set_resource_power_mode(-1, SC_R_UART_3, SC_PM_PW_MODE_ON);
+	if (err != SC_ERR_NONE)
+		return 0;
+
+	/* Set UART3 clock root to 80 MHz */
+	rate = 80000000;
+	err = sc_pm_set_clock_rate(-1, SC_R_UART_3, SC_PM_CLK_PER, &rate);
+	if (err != SC_ERR_NONE)
+		return 0;
+
+	/* Enable UART3 clock root */
+	err = sc_pm_clock_enable(-1, SC_R_UART_3, SC_PM_CLK_PER, true, false);
+	if (err != SC_ERR_NONE)
+		return 0;
+
+	setup_iomux_uart();
+
+	return 0;
+}
+
+#if IS_ENABLED(CONFIG_DM_GPIO)
+static void board_gpio_init(void)
+{
+	/* TODO */
+}
+#else
+static inline void board_gpio_init(void) {}
+#endif
+
+#if IS_ENABLED(CONFIG_FEC_MXC)
+#include <miiphy.h>
+
+int board_phy_config(struct phy_device *phydev)
+{
+	if (phydev->drv->config)
+		phydev->drv->config(phydev);
+
+	return 0;
+}
+#endif
+
+void build_info(void)
+{
+	u32 sc_build = 0, sc_commit = 0;
+
+	/* Get SCFW build and commit id */
+	sc_misc_build_info(-1, &sc_build, &sc_commit);
+	if (!sc_build) {
+		printf("SCFW does not support build info\n");
+		sc_commit = 0; /* Display 0 if build info not supported */
+	}
+	printf("Build: SCFW %x\n", sc_commit);
+}
+
+int checkboard(void)
+{
+	puts("Model: Toradex Colibri iMX8X\n");
+
+	build_info();
+	print_bootinfo();
+
+	return 0;
+}
+
+int board_init(void)
+{
+	board_gpio_init();
+
+	return 0;
+}
+
+void detail_board_ddr_info(void)
+{
+	puts("\nDDR    ");
+}
+
+/*
+ * Board specific reset that is system reset.
+ */
+void reset_cpu(ulong addr)
+{
+	/* TODO */
+}
+
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+int ft_board_setup(void *blob, bd_t *bd)
+{
+	return ft_common_board_setup(blob, bd);
+}
+#endif
+
+int board_mmc_get_env_dev(int devno)
+{
+	return devno;
+}
+
+int board_late_init(void)
+{
+#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
+/* TODO move to common */
+	env_set("board_name", "Colibri iMX8QXP");
+	env_set("board_rev", "v1.0");
+#endif
+
+	return 0;
+}
diff --git a/board/wandboard/Makefile b/board/wandboard/Makefile
index 6e886f729a..c3d80536b3 100644
--- a/board/wandboard/Makefile
+++ b/board/wandboard/Makefile
@@ -2,4 +2,5 @@
 #
 # (C) Copyright 2013 Freescale Semiconductor, Inc.
 
-obj-y  := wandboard.o spl.o
+obj-y  := wandboard.o
+obj-$(CONFIG_SPL_BUILD) += spl.o
diff --git a/board/wandboard/spl.c b/board/wandboard/spl.c
index 000cb109fc..7b0f15a5c4 100644
--- a/board/wandboard/spl.c
+++ b/board/wandboard/spl.c
@@ -20,7 +20,6 @@
 #include <asm/arch/sys_proto.h>
 #include <spl.h>
 
-#if defined(CONFIG_SPL_BUILD)
 #include <asm/arch/mx6-ddr.h>
 /*
  * Driving strength:
@@ -513,5 +512,3 @@ int board_mmc_init(bd_t *bis)
 
 	return 0;
 }
-
-#endif