diff options
| author | Santan Kumar <santan.kumar@nxp.com> | 2017-03-07 11:21:03 +0530 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2017-03-28 09:27:58 -0700 |
| commit | 54ad7b5ab8ad4e5577e79f782582d1d0f79b4659 (patch) | |
| tree | 7d7f81d62678d7a40dffa754018637c2481336f8 /board | |
| parent | 0aaa1a90b3ac806808971c8f5729c59ca7abff67 (diff) | |
board: freescale: ls2080a/ls2088a: Enable PPA
Enable PPA on LS2080A, LS2088A boards:
-LS2080ARDB, LS2080AQDS
-LS2088ARDB, LS2088AQDS
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'board')
| -rw-r--r-- | board/freescale/ls2080aqds/ls2080aqds.c | 7 | ||||
| -rw-r--r-- | board/freescale/ls2080ardb/ls2080ardb.c | 5 |
2 files changed, 12 insertions, 0 deletions
diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c index e1de799ee5..6da9c6cfe8 100644 --- a/board/freescale/ls2080aqds/ls2080aqds.c +++ b/board/freescale/ls2080aqds/ls2080aqds.c @@ -19,6 +19,8 @@ #include <asm/arch/soc.h> #include <hwconfig.h> #include <fsl_sec.h> +#include <asm/arch/ppa.h> + #include "../common/qixis.h" #include "ls2080aqds_qixis.h" @@ -224,6 +226,11 @@ int board_init(void) #endif select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); rtc_enable_32khz_output(); + +#ifdef CONFIG_FSL_LS_PPA + ppa_init(); +#endif + #ifdef CONFIG_FSL_CAAM sec_init(); #endif diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index 6d410c05e9..ea05ec6f65 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -19,6 +19,7 @@ #include <i2c.h> #include <asm/arch/mmu.h> #include <asm/arch/soc.h> +#include <asm/arch/ppa.h> #include <fsl_sec.h> #include "../common/qixis.h" @@ -181,6 +182,10 @@ int board_init(void) QIXIS_WRITE(rst_ctl, QIXIS_RST_CTL_RESET_EN); +#ifdef CONFIG_FSL_LS_PPA + ppa_init(); +#endif + #ifdef CONFIG_FSL_MC_ENET /* invert AQR405 IRQ pins polarity */ out_le32(irq_ccsr + IRQCR_OFFSET / 4, AQR405_IRQ_MASK); |