diff options
author | Tom Rini <trini@konsulko.com> | 2020-07-02 09:53:34 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2020-07-02 09:53:34 -0400 |
commit | 785195941b0746ac987a0ca501dae3e570b9f042 (patch) | |
tree | 317f4d937fb80de27123a1d18adc29ad5bf9337c /board | |
parent | e2a4d24e6b1f3d30136e2dde7b6fbf35bd427b8a (diff) | |
parent | add0dc1f7de91112d9e738f9482b09b75fa86acb (diff) |
Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-riscv into next
- Add Sipeed Maix support
- Update clock handler and proper cpu features
Diffstat (limited to 'board')
-rw-r--r-- | board/sipeed/maix/Kconfig | 47 | ||||
-rw-r--r-- | board/sipeed/maix/MAINTAINERS | 11 | ||||
-rw-r--r-- | board/sipeed/maix/Makefile | 5 | ||||
-rw-r--r-- | board/sipeed/maix/maix.c | 41 |
4 files changed, 104 insertions, 0 deletions
diff --git a/board/sipeed/maix/Kconfig b/board/sipeed/maix/Kconfig new file mode 100644 index 0000000000..0cdcd32adc --- /dev/null +++ b/board/sipeed/maix/Kconfig @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com> + +if TARGET_SIPEED_MAIX + +config SYS_BOARD + default "maix" + +config SYS_VENDOR + default "sipeed" + +config SYS_CPU + default "generic" + +config SYS_CONFIG_NAME + default "sipeed-maix" + +config SYS_TEXT_BASE + default 0x80000000 + +config DEFAULT_DEVICE_TREE + default "k210-maix-bit" + +config NR_CPUS + default 2 + +config NR_DRAM_BANKS + default 3 + +config BOARD_SPECIFIC_OPTIONS + def_bool y + select GENERIC_RISCV + select RISCV_PRIV_1_9 + imply SMP + imply DM_SERIAL + imply SIFIVE_SERIAL + imply SIFIVE_CLINT + imply POWER_DOMAIN + imply SIMPLE_PM_BUS + imply CLK_CCF + imply CLK_COMPOSITE_CCF + imply CLK_K210 + imply DM_RESET + imply RESET_SYSCON + imply SYSRESET + imply SYSRESET_SYSCON +endif diff --git a/board/sipeed/maix/MAINTAINERS b/board/sipeed/maix/MAINTAINERS new file mode 100644 index 0000000000..e7bb9ec433 --- /dev/null +++ b/board/sipeed/maix/MAINTAINERS @@ -0,0 +1,11 @@ +Sipeed Maix BOARD +M: Sean Anderson <seanga2@gmail.com> +S: Maintained +F: arch/riscv/dts/k210.dtsi +F: arch/riscv/dts/k210-maix-bit.dts +F: board/sipeed/maix/ +F: configs/sipeed_maix_bitm_defconfig +F: doc/board/sipeed/ +F: include/configs/sipeed-maix.h +F: include/dt-bindings/*/k210-sysctl.h +F: test/dm/k210_pll.c diff --git a/board/sipeed/maix/Makefile b/board/sipeed/maix/Makefile new file mode 100644 index 0000000000..4acff5b31e --- /dev/null +++ b/board/sipeed/maix/Makefile @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (c) 2019 Western Digital Corporation or its affiliates. + +obj-y += maix.o diff --git a/board/sipeed/maix/maix.c b/board/sipeed/maix/maix.c new file mode 100644 index 0000000000..cbcb23cf5c --- /dev/null +++ b/board/sipeed/maix/maix.c @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com> + */ + +#include <common.h> +#include <clk.h> +#include <dm.h> +#include <fdt_support.h> +#include <asm/io.h> + +phys_size_t get_effective_memsize(void) +{ + return CONFIG_SYS_SDRAM_SIZE; +} + +int board_init(void) +{ + int ret, i; + const char * const banks[] = { "sram0", "sram1", "airam" }; + ofnode memory; + struct clk clk; + + /* Enable RAM clocks */ + memory = ofnode_by_compatible(ofnode_null(), "kendryte,k210-sram"); + if (ofnode_equal(memory, ofnode_null())) + return -ENOENT; + + for (i = 0; i < ARRAY_SIZE(banks); i++) { + ret = clk_get_by_name_nodev(memory, banks[i], &clk); + if (ret) + continue; + + ret = clk_enable(&clk); + clk_free(&clk); + if (ret) + return ret; + } + + return 0; +} |