diff options
author | Tom Rini <trini@konsulko.com> | 2020-01-03 09:48:47 -0500 |
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committer | Tom Rini <trini@konsulko.com> | 2020-01-03 09:48:47 -0500 |
commit | 8fbbec12f7d2c18f8883f3371cfca74a98b5dd87 (patch) | |
tree | a0e6f0bd143fa9baefe2c927b7fe089ebe8d51d7 /board | |
parent | 87f69f467a8335b171c71bf217d2625d515acd7c (diff) | |
parent | 63618e71e89b3fc669d56bcb4389e70a6b3a4ea8 (diff) |
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq into next
- updates and fixes on ls1028a, lx2, ls1046a, MC-DPSPARSER support
Diffstat (limited to 'board')
-rw-r--r-- | board/freescale/ls1028a/ls1028a.c | 12 | ||||
-rw-r--r-- | board/freescale/ls1046afrwy/ls1046afrwy.c | 11 |
2 files changed, 20 insertions, 3 deletions
diff --git a/board/freescale/ls1028a/ls1028a.c b/board/freescale/ls1028a/ls1028a.c index a9606b8865..1151e77531 100644 --- a/board/freescale/ls1028a/ls1028a.c +++ b/board/freescale/ls1028a/ls1028a.c @@ -86,7 +86,19 @@ int board_init(void) if (!i2c_get_chip_for_busnum(0, I2C_MUX_PCA_ADDR_PRI, 1, &dev)) dm_i2c_write(dev, 0x0b, &val, 1); #endif +#endif +#if defined(CONFIG_TARGET_LS1028ARDB) + u8 reg; + + reg = QIXIS_READ(brdcfg[4]); + /* + * Field | Function + * 3 | DisplayPort Power Enable (net DP_PWR_EN): + * DPPWR | 0= DP_PWR is enabled. + */ + reg &= ~(DP_PWD_EN_DEFAULT_MASK); + QIXIS_WRITE(brdcfg[4], reg); #endif return 0; } diff --git a/board/freescale/ls1046afrwy/ls1046afrwy.c b/board/freescale/ls1046afrwy/ls1046afrwy.c index ac2f8ee436..db8b3a5b92 100644 --- a/board/freescale/ls1046afrwy/ls1046afrwy.c +++ b/board/freescale/ls1046afrwy/ls1046afrwy.c @@ -24,7 +24,8 @@ #define LS1046A_PORSR1_REG 0x1EE0000 #define BOOT_SRC_SD 0x20000000 #define BOOT_SRC_MASK 0xFF800000 -#define BOARD_REV_GPIO 13 +#define BOARD_REV_GPIO_SHIFT 17 +#define BOARD_REV_MASK 0x03 #define USB2_SEL_MASK 0x00000100 #define BYTE_SWAP_32(word) ((((word) & 0xff000000) >> 24) | \ @@ -87,10 +88,14 @@ int board_early_init_f(void) static inline uint8_t get_board_version(void) { - u8 val; struct ccsr_gpio *pgpio = (void *)(GPIO2_BASE_ADDR); - val = (in_le32(&pgpio->gpdat) >> BOARD_REV_GPIO) & 0x03; + /* GPIO 13 and GPIO 14 are used for Board Rev */ + u32 gpio_val = ((in_be32(&pgpio->gpdat) >> BOARD_REV_GPIO_SHIFT)) + & BOARD_REV_MASK; + + /* GPIOs' are 0..31 in Big Endiness, swap GPIO 13 and GPIO 14 */ + u8 val = ((gpio_val >> 1) | (gpio_val << 1)) & BOARD_REV_MASK; return val; } |