summaryrefslogtreecommitdiff
path: root/board
diff options
context:
space:
mode:
authorTom Rini <trini@konsulko.com>2019-08-09 23:27:15 -0400
committerTom Rini <trini@konsulko.com>2019-08-09 23:27:15 -0400
commit9fd8b2c8c714b383b6768d53d7b46682fdf87013 (patch)
tree47d9b59ac1129e9bf71a065d5f3c526d1ada15a5 /board
parent188f0109055300a099f90bedd96b0e93d28acfbd (diff)
parentdbaec467671fd5b56cf380121340844863f5472d (diff)
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Enable SD slot on Intel Edison - Populate CSRT ACPI table for shared DMA controller on Intel Tangier - Convert Intel ICH-SPI driver to use new spi-mem ops - Enable config_distro_bootcmd for QEMU x86 - Support U-Boot as a payload for Intel Slim Bootloader - Avoid writing temporary asl files into the source tree which fixes the parallel build issue occasionally seen
Diffstat (limited to 'board')
-rw-r--r--board/intel/Kconfig14
-rw-r--r--board/intel/edison/edison.c10
-rw-r--r--board/intel/slimbootloader/Kconfig28
-rw-r--r--board/intel/slimbootloader/MAINTAINERS6
-rw-r--r--board/intel/slimbootloader/Makefile5
-rw-r--r--board/intel/slimbootloader/slimbootloader.c21
-rw-r--r--board/intel/slimbootloader/start.S9
7 files changed, 93 insertions, 0 deletions
diff --git a/board/intel/Kconfig b/board/intel/Kconfig
index 5131836cb0..7b16ec4dc1 100644
--- a/board/intel/Kconfig
+++ b/board/intel/Kconfig
@@ -73,6 +73,19 @@ config TARGET_MINNOWMAX
Note that PCIE_ECAM_BASE is set up by the FSP so the value used
by U-Boot matches that value.
+config TARGET_SLIMBOOTLOADER
+ bool "slimbootloader"
+ help
+ This target is used for running U-Boot on top of Slim Bootloader
+ boot firmware as a payload. Slim Bootloader does memory initialization
+ and silicon initialization, and it passes necessary information in
+ HOB (Hand Off Block) to a payload. The payload consumes HOB data
+ which is generated by Slim Bootloader for its driver initialization.
+ Slim Bootloader consumes FSP and its HOB, but FSP HOB is cleared
+ Before launching a payload. Instead, Slim Bootloader generates its
+ HOB data such as memory info, serial port info and so on.
+ Refer to doc/board/intel/slimbootloader.rst for the details.
+
endchoice
source "board/intel/bayleybay/Kconfig"
@@ -82,5 +95,6 @@ source "board/intel/crownbay/Kconfig"
source "board/intel/edison/Kconfig"
source "board/intel/galileo/Kconfig"
source "board/intel/minnowmax/Kconfig"
+source "board/intel/slimbootloader/Kconfig"
endif
diff --git a/board/intel/edison/edison.c b/board/intel/edison/edison.c
index 5faf3c57f2..d80ee3aa8a 100644
--- a/board/intel/edison/edison.c
+++ b/board/intel/edison/edison.c
@@ -13,9 +13,19 @@
#include <linux/usb/gadget.h>
#include <asm/cache.h>
+#include <asm/pmu.h>
#include <asm/scu.h>
#include <asm/u-boot-x86.h>
+/* List of Intel Tangier LSSs */
+#define PMU_LSS_TANGIER_SDIO0_01 1
+
+int board_early_init_r(void)
+{
+ pmu_turn_power(PMU_LSS_TANGIER_SDIO0_01, true);
+ return 0;
+}
+
static struct dwc3_device dwc3_device_data = {
.maximum_speed = USB_SPEED_HIGH,
.base = CONFIG_SYS_USB_OTG_BASE,
diff --git a/board/intel/slimbootloader/Kconfig b/board/intel/slimbootloader/Kconfig
new file mode 100644
index 0000000000..8c7e22cc33
--- /dev/null
+++ b/board/intel/slimbootloader/Kconfig
@@ -0,0 +1,28 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2019 Intel Corporation <www.intel.com>
+
+if TARGET_SLIMBOOTLOADER
+
+config SYS_BOARD
+ default "slimbootloader"
+
+config SYS_VENDOR
+ default "intel"
+
+config SYS_SOC
+ default "slimbootloader"
+
+config SYS_CONFIG_NAME
+ default "slimbootloader"
+
+config SYS_TEXT_BASE
+ default 0x00100000
+
+config BOARD_SPECIFIC_OPTIONS
+ def_bool y
+ select SYS_SLIMBOOTLOADER
+ select USB_STORAGE
+ select USB_KEYBOARD
+
+endif
diff --git a/board/intel/slimbootloader/MAINTAINERS b/board/intel/slimbootloader/MAINTAINERS
new file mode 100644
index 0000000000..e6935517e0
--- /dev/null
+++ b/board/intel/slimbootloader/MAINTAINERS
@@ -0,0 +1,6 @@
+Intel Slim Bootloader Payload
+M: Aiden Park <aiden.park@intel.com>
+S: Maintained
+F: board/intel/slimbootloader
+F: include/configs/slimbootloader.h
+F: configs/slimbootloader_defconfig
diff --git a/board/intel/slimbootloader/Makefile b/board/intel/slimbootloader/Makefile
new file mode 100644
index 0000000000..fd8fa98a8d
--- /dev/null
+++ b/board/intel/slimbootloader/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2019 Intel Corporation <www.intel.com>
+
+obj-y += start.o slimbootloader.o
diff --git a/board/intel/slimbootloader/slimbootloader.c b/board/intel/slimbootloader/slimbootloader.c
new file mode 100644
index 0000000000..f50eeb823f
--- /dev/null
+++ b/board/intel/slimbootloader/slimbootloader.c
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Intel Corporation <www.intel.com>
+ */
+
+#include <common.h>
+
+int board_early_init_r(void)
+{
+ /*
+ * Make sure PCI bus is enumerated so that peripherals on the PCI bus
+ * can be discovered by their drivers.
+ *
+ * Slim Bootloader has already done PCI bus enumeration before loading
+ * U-Boot, so U-Boot needs to preserve PCI configuration.
+ * Therefore, '# CONFIG_PCI_PNP is not set' is included in defconfig.
+ */
+ pci_init();
+
+ return 0;
+}
diff --git a/board/intel/slimbootloader/start.S b/board/intel/slimbootloader/start.S
new file mode 100644
index 0000000000..5c3f3df09e
--- /dev/null
+++ b/board/intel/slimbootloader/start.S
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2019 Intel Corporation <www.intel.com>
+ */
+
+/* board early initialization */
+.globl early_board_init
+early_board_init:
+ jmp early_board_init_ret