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authorJakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>2017-12-15 16:23:14 +0100
committerPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>2017-12-17 16:59:41 +0100
commitaa41220f6f7c79284ce5880e2533f81c125237a4 (patch)
treea7466070bbd17000125e5c003be18955fb09a396 /board
parentc5a4141343e601bac2789c137e8be665c074f898 (diff)
rockchip: rk3399-puma: set gpio4cd iodomain to 1.8V
The PCIe reset signal is connected to GPIO4_C6 on the Puma module. This pin is supplied by 1.8V, but the default iodomain setting is 3.0V and in this situation the pin is unable to go high. Linux assumes that this signal works in early boot as PCIe is probed before loading the iodomain driver. Make PCIe work in Linux by setting the gpio4cd iodomain to 1.8V. Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Diffstat (limited to 'board')
-rw-r--r--board/theobroma-systems/puma_rk3399/puma-rk3399.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
index 27e3823d52..c6690fa069 100644
--- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c
+++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
@@ -8,13 +8,17 @@
#include <dm.h>
#include <misc.h>
#include <spl.h>
+#include <syscon.h>
#include <usb.h>
#include <dm/pinctrl.h>
#include <dm/uclass-internal.h>
+#include <asm/io.h>
#include <asm/gpio.h>
#include <asm/setup.h>
#include <asm/arch/clock.h>
#include <asm/arch/cru_rk3399.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/grf_rk3399.h>
#include <asm/arch/periph.h>
#include <power/regulator.h>
#include <u-boot/sha256.h>
@@ -180,10 +184,25 @@ static void setup_serial(void)
#endif
}
+static void setup_iodomain(void)
+{
+ const u32 GRF_IO_VSEL_GPIO4CD_SHIFT = 3;
+ struct rk3399_grf_regs *grf =
+ syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+ /*
+ * Set bit 3 in GRF_IO_VSEL so PCIE_RST# works (pin GPIO4_C6).
+ * Linux assumes that PCIE_RST# works out of the box as it probes
+ * PCIe before loading the iodomain driver.
+ */
+ rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_GPIO4CD_SHIFT);
+}
+
int misc_init_r(void)
{
setup_serial();
setup_macaddr();
+ setup_iodomain();
return 0;
}