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authorStefan Mavrodiev <stefan@olimex.com>2017-11-03 08:56:51 +0200
committerJagan Teki <jagan@amarulasolutions.com>2017-12-07 10:57:23 +0530
commitaba3924927263f23d8ca302b52b1988ed924e5b1 (patch)
tree9d9c1b9f15d5b8586b30ad32566b1abdbe825db8 /board
parent64089178219371a512ddca8016d78bfdbe84565d (diff)
sunxi: Fix A20-OLinuXino-MICRO LAN8710 support
>From revision J the board uses new phy chip LAN8710. Compared with RTL8201, RA17 pin is TXERR. It has pullup which causes phy not to work. To fix this PA17 is muxed with GMAC function. This makes the pin output-low. Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
Diffstat (limited to 'board')
-rw-r--r--board/sunxi/gmac.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/board/sunxi/gmac.c b/board/sunxi/gmac.c
index 69eb8ff2d9..826650c89b 100644
--- a/board/sunxi/gmac.c
+++ b/board/sunxi/gmac.c
@@ -33,7 +33,11 @@ void eth_init_board(void)
#ifndef CONFIG_MACH_SUN6I
/* Configure pin mux settings for GMAC */
+#ifdef CONFIG_SUN7I_GMAC_FORCE_TXERR
+ for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(17); pin++) {
+#else
for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(16); pin++) {
+#endif
#ifdef CONFIG_RGMII
/* skip unused pins in RGMII mode */
if (pin == SUNXI_GPA(9) || pin == SUNXI_GPA(14))