diff options
author | Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> | 2014-03-28 17:16:32 +0900 |
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committer | Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | 2014-04-28 04:35:12 +0900 |
commit | e44154ef0a26e7cd22c297947cfa1e89fb439d35 (patch) | |
tree | 7c5a4971197f71a32176f291841a89e540a13311 /board | |
parent | ec9b386e267bf9bf0b0214836458adca502a64c3 (diff) |
arm: rmobile: koelsch: Remove NOR-Flash support
Koelsch board has NOR-Flash. But user uses SPI-Flash ROM instead of NOR-Flash.
This removed the setting of NOR-Flash.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'board')
-rw-r--r-- | board/renesas/koelsch/koelsch.c | 183 |
1 files changed, 0 insertions, 183 deletions
diff --git a/board/renesas/koelsch/koelsch.c b/board/renesas/koelsch/koelsch.c index 10dc088c2a..d4f63724b4 100644 --- a/board/renesas/koelsch/koelsch.c +++ b/board/renesas/koelsch/koelsch.c @@ -23,168 +23,6 @@ DECLARE_GLOBAL_DATA_PTR; -#define s_init_wait(cnt) \ - ({ \ - u32 i = 0x10000 * cnt; \ - while (i > 0) \ - i--; \ - }) - - -#define dbpdrgd_check(bsc) \ - ({ \ - while ((readl(&bsc->dbpdrgd) & 0x1) != 0x1) \ - ; \ - }) - -#if defined(CONFIG_NORFLASH) -static void bsc_init(void) -{ - struct rcar_lbsc *lbsc = (struct rcar_lbsc *)LBSC_BASE; - struct rcar_dbsc3 *dbsc3_0 = (struct rcar_dbsc3 *)DBSC3_0_BASE; - - /* LBSC */ - writel(0x00000020, &lbsc->cs0ctrl); - writel(0x00000020, &lbsc->cs1ctrl); - writel(0x00002020, &lbsc->ecs0ctrl); - writel(0x00002020, &lbsc->ecs1ctrl); - - writel(0x077F077F, &lbsc->cswcr0); - writel(0x077F077F, &lbsc->cswcr1); - writel(0x077F077F, &lbsc->ecswcr0); - writel(0x077F077F, &lbsc->ecswcr1); - - /* DBSC3 */ - s_init_wait(10); - - writel(0x0000A55A, &dbsc3_0->dbpdlck); - writel(0x00000001, &dbsc3_0->dbpdrga); - writel(0x80000000, &dbsc3_0->dbpdrgd); - writel(0x00000004, &dbsc3_0->dbpdrga); - dbpdrgd_check(dbsc3_0); - - writel(0x00000006, &dbsc3_0->dbpdrga); - writel(0x0001C000, &dbsc3_0->dbpdrgd); - - writel(0x00000023, &dbsc3_0->dbpdrga); - writel(0x00FD2480, &dbsc3_0->dbpdrgd); - - writel(0x00000010, &dbsc3_0->dbpdrga); - writel(0xF004649B, &dbsc3_0->dbpdrgd); - - writel(0x0000000F, &dbsc3_0->dbpdrga); - writel(0x00181EE4, &dbsc3_0->dbpdrgd); - - writel(0x0000000E, &dbsc3_0->dbpdrga); - writel(0x33C03812, &dbsc3_0->dbpdrgd); - - writel(0x00000003, &dbsc3_0->dbpdrga); - writel(0x0300C481, &dbsc3_0->dbpdrgd); - - writel(0x00000007, &dbsc3_0->dbkind); - writel(0x10030A02, &dbsc3_0->dbconf0); - writel(0x00000001, &dbsc3_0->dbphytype); - writel(0x00000000, &dbsc3_0->dbbl); - writel(0x0000000B, &dbsc3_0->dbtr0); - writel(0x00000008, &dbsc3_0->dbtr1); - writel(0x00000000, &dbsc3_0->dbtr2); - writel(0x0000000B, &dbsc3_0->dbtr3); - writel(0x000C000B, &dbsc3_0->dbtr4); - writel(0x00000027, &dbsc3_0->dbtr5); - writel(0x0000001C, &dbsc3_0->dbtr6); - writel(0x00000005, &dbsc3_0->dbtr7); - writel(0x00000018, &dbsc3_0->dbtr8); - writel(0x00000008, &dbsc3_0->dbtr9); - writel(0x0000000C, &dbsc3_0->dbtr10); - writel(0x00000009, &dbsc3_0->dbtr11); - writel(0x00000012, &dbsc3_0->dbtr12); - writel(0x000000D0, &dbsc3_0->dbtr13); - writel(0x00140005, &dbsc3_0->dbtr14); - writel(0x00050004, &dbsc3_0->dbtr15); - writel(0x70233005, &dbsc3_0->dbtr16); - writel(0x000C0000, &dbsc3_0->dbtr17); - writel(0x00000300, &dbsc3_0->dbtr18); - writel(0x00000040, &dbsc3_0->dbtr19); - writel(0x00000001, &dbsc3_0->dbrnk0); - writel(0x00020001, &dbsc3_0->dbadj0); - writel(0x20082008, &dbsc3_0->dbadj2); - writel(0x00020002, &dbsc3_0->dbwt0cnf0); - writel(0x0000000F, &dbsc3_0->dbwt0cnf4); - - writel(0x00000015, &dbsc3_0->dbpdrga); - writel(0x00000D70, &dbsc3_0->dbpdrgd); - - writel(0x00000016, &dbsc3_0->dbpdrga); - writel(0x00000006, &dbsc3_0->dbpdrgd); - - writel(0x00000017, &dbsc3_0->dbpdrga); - writel(0x00000018, &dbsc3_0->dbpdrgd); - - writel(0x00000012, &dbsc3_0->dbpdrga); - writel(0x9D5CBB66, &dbsc3_0->dbpdrgd); - - writel(0x00000013, &dbsc3_0->dbpdrga); - writel(0x1A868300, &dbsc3_0->dbpdrgd); - - writel(0x00000023, &dbsc3_0->dbpdrga); - writel(0x00FDB6C0, &dbsc3_0->dbpdrgd); - - writel(0x00000014, &dbsc3_0->dbpdrga); - writel(0x300214D8, &dbsc3_0->dbpdrgd); - - writel(0x0000001A, &dbsc3_0->dbpdrga); - writel(0x930035C7, &dbsc3_0->dbpdrgd); - - writel(0x00000060, &dbsc3_0->dbpdrga); - writel(0x330657B2, &dbsc3_0->dbpdrgd); - - writel(0x00000011, &dbsc3_0->dbpdrga); - writel(0x1000040B, &dbsc3_0->dbpdrgd); - - writel(0x0000FA00, &dbsc3_0->dbcmd); - writel(0x00000001, &dbsc3_0->dbpdrga); - writel(0x00000071, &dbsc3_0->dbpdrgd); - - writel(0x00000004, &dbsc3_0->dbpdrga); - dbpdrgd_check(dbsc3_0); - - writel(0x0000FA00, &dbsc3_0->dbcmd); - writel(0x2100FA00, &dbsc3_0->dbcmd); - writel(0x0000FA00, &dbsc3_0->dbcmd); - writel(0x0000FA00, &dbsc3_0->dbcmd); - writel(0x0000FA00, &dbsc3_0->dbcmd); - writel(0x0000FA00, &dbsc3_0->dbcmd); - writel(0x0000FA00, &dbsc3_0->dbcmd); - writel(0x0000FA00, &dbsc3_0->dbcmd); - writel(0x0000FA00, &dbsc3_0->dbcmd); - - writel(0x110000DB, &dbsc3_0->dbcmd); - - writel(0x00000001, &dbsc3_0->dbpdrga); - writel(0x00000181, &dbsc3_0->dbpdrgd); - - writel(0x00000004, &dbsc3_0->dbpdrga); - dbpdrgd_check(dbsc3_0); - - writel(0x00000001, &dbsc3_0->dbpdrga); - writel(0x0000FE01, &dbsc3_0->dbpdrgd); - - writel(0x00000004, &dbsc3_0->dbpdrga); - dbpdrgd_check(dbsc3_0); - - writel(0x00000000, &dbsc3_0->dbbs0cnt1); - writel(0x01004C20, &dbsc3_0->dbcalcnf); - writel(0x014000AA, &dbsc3_0->dbcaltr); - writel(0x00000140, &dbsc3_0->dbrfcnf0); - writel(0x00081860, &dbsc3_0->dbrfcnf1); - writel(0x00010000, &dbsc3_0->dbrfcnf2); - writel(0x00000001, &dbsc3_0->dbrfen); - writel(0x00000001, &dbsc3_0->dbacen); -} -#else -#define bsc_init() do {} while (0) -#endif /* CONFIG_NORFLASH */ - void s_init(void) { struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE; @@ -196,9 +34,6 @@ void s_init(void) /* QoS */ qos_init(); - - /* BSC */ - bsc_init(); } #define MSTPSR1 0xE6150038 @@ -213,18 +48,6 @@ void s_init(void) #define SMSTPCR8 0xE6150990 #define ETHER_MSTP813 (1 << 13) -#define PMMR 0xE6060000 -#define GPSR4 0xE6060014 -#define IPSR14 0xE6060058 - -#define set_guard_reg(addr, mask, value) \ -{ \ - u32 val; \ - val = (readl(addr) & ~(mask)) | (value); \ - writel(~val, PMMR); \ - writel(val, addr); \ -} - #define mstp_setbits(type, addr, saddr, set) \ out_##type((saddr), in_##type(addr) | (set)) #define mstp_clrbits(type, addr, saddr, clear) \ @@ -238,13 +61,7 @@ int board_early_init_f(void) { mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); -#if defined(CONFIG_NORFLASH) /* SCIF0 */ - set_guard_reg(GPSR4, 0x34000000, 0x00000000); - set_guard_reg(IPSR14, 0x00000FC7, 0x00000481); - set_guard_reg(GPSR4, 0x00000000, 0x34000000); -#endif - mstp_clrbits_le32(MSTPSR7, SMSTPCR7, SCIF0_MSTP721); /* ETHER */ |