diff options
author | Steven A. Falco <sfalco@harris.com> | 2008-08-06 15:42:52 -0400 |
---|---|---|
committer | Stefan Roese <sr@denx.de> | 2008-08-07 12:06:18 +0200 |
commit | eab1007334b93a6209f1ec33615e26ef5311ede7 (patch) | |
tree | 8e9cb65e8e0eb326b51adb6ddb7f082ef0fa09a1 /board | |
parent | 81091f58f0c58ecd26c5b05de2ae20ca6cdb521c (diff) |
ppc4xx: Sequoia has two UARTs in "4-pin" mode. Configure the GPIOs as per schematic.
The Sequoia board has two UARTs in "4-pin" mode. This patch modifies the GPIO
configuration to match the schematic, and also sets the SDR0_PFC1 register to
select the corresponding mode for the UARTs.
Signed-off-by: Steven A. Falco <sfalco@harris.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board')
-rw-r--r-- | board/amcc/sequoia/sequoia.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/board/amcc/sequoia/sequoia.c b/board/amcc/sequoia/sequoia.c index b833092f19..198db1a1d3 100644 --- a/board/amcc/sequoia/sequoia.c +++ b/board/amcc/sequoia/sequoia.c @@ -93,6 +93,11 @@ int board_early_init_f(void) #ifdef CONFIG_I2C_MULTI_BUS sdr0_pfc1 |= ((sdr0_pfc1 & ~SDR0_PFC1_SIS_MASK) | SDR0_PFC1_SIS_IIC1_SEL); #endif + /* Two UARTs, so we need 4-pin mode. Also, we want CTS/RTS mode. */ + sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_U0IM_MASK) | SDR0_PFC1_U0IM_4PINS; + sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_U0ME_MASK) | SDR0_PFC1_U0ME_CTS_RTS; + sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_U1ME_MASK) | SDR0_PFC1_U1ME_CTS_RTS; + mfsdr(SDR0_PFC2, sdr0_pfc2); sdr0_pfc2 = (sdr0_pfc2 & ~SDR0_PFC2_SELECT_MASK) | SDR0_PFC2_SELECT_CONFIG_4; |