diff options
author | Wolfgang Denk <wd@denx.de> | 2011-11-23 21:23:45 +0100 |
---|---|---|
committer | Wolfgang Denk <wd@denx.de> | 2011-11-23 21:23:45 +0100 |
commit | fdbe8b9a2d1858ba35dd6214315563ad44d4a0e3 (patch) | |
tree | 98c39a0594ef02e08d5842cfff1f1d6bcc5a8eda /board | |
parent | bd0f5ca806c73f9e1ef4a2a0416233ab7e257df9 (diff) | |
parent | d780e74fc3abe6a8b9a01357720c15d974d83dae (diff) |
Merge branch 'hs@denx.de' of git://git.denx.de/u-boot-staging
* 'hs@denx.de' of git://git.denx.de/u-boot-staging:
drivers/net/dnet.c: Fix GCC 4.6 warnings
board/xaeniax/flash.c: Fix GCC 4.6 warnings
net/bootp.c: Fix GCC 4.6 warning
common/cmd_bootm.c: Fix GCC 4.6 warnings
board/mx1ads/mx1ads.c: Fix GCC 4.6 warning
board/mx1ads/syncflash.c: Fix GCC 4.6 warnings
board/lubbock/flash.c: Fix GCC 4.6 warnings
drivers/net/cs8900.c: Fix GCC 4.6 warning
arch/arm/cpu/arm926ejs/omap/cpuinfo.c: Fix GCC 4.6 warnings
drivers/net/lan91c96.c: Fix GCC 4.6 warning
board/ronetix/pm9263/pm9263.c: Fix GCC 4.6 warning
drivers/mtd/onenand/samsung.c: Fix GCC 4.6 warning
drivers/usb/musb/musb_hcd.c: Fix GCC 4.6 warning
Diffstat (limited to 'board')
-rw-r--r-- | board/lubbock/flash.c | 7 | ||||
-rw-r--r-- | board/mx1ads/mx1ads.c | 7 | ||||
-rw-r--r-- | board/mx1ads/syncflash.c | 20 | ||||
-rw-r--r-- | board/ronetix/pm9263/pm9263.c | 13 | ||||
-rw-r--r-- | board/xaeniax/flash.c | 7 |
5 files changed, 24 insertions, 30 deletions
diff --git a/board/lubbock/flash.c b/board/lubbock/flash.c index e1e7807bc1..bf8f0c9123 100644 --- a/board/lubbock/flash.c +++ b/board/lubbock/flash.c @@ -220,7 +220,7 @@ static ulong flash_get_size (FPW *addr, flash_info_t *info) int flash_erase (flash_info_t *info, int s_first, int s_last) { - int flag, prot, sect; + int prot, sect; ulong type, start; int rcode = 0; @@ -255,7 +255,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) } /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts (); + disable_interrupts(); /* Start erase on unprotected sectors */ for (sect = s_first; sect <= s_last; sect++) { @@ -389,7 +389,6 @@ static int write_data (flash_info_t *info, ulong dest, FPW data) { FPWV *addr = (FPWV *) dest; ulong status; - int flag; ulong start; /* Check if Flash is (sufficiently) erased */ @@ -398,7 +397,7 @@ static int write_data (flash_info_t *info, ulong dest, FPW data) return (2); } /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts (); + disable_interrupts(); *addr = (FPW) 0x00400040; /* write setup */ *addr = data; diff --git a/board/mx1ads/mx1ads.c b/board/mx1ads/mx1ads.c index 86b49fb60d..da9e21dddb 100644 --- a/board/mx1ads/mx1ads.c +++ b/board/mx1ads/mx1ads.c @@ -27,6 +27,7 @@ #include <netdev.h> /*#include <mc9328.h>*/ #include <asm/arch/imx-regs.h> +#include <asm/io.h> DECLARE_GLOBAL_DATA_PTR; @@ -80,8 +81,6 @@ static u32 mc9328sid; int board_early_init_f(void) { - volatile unsigned int tmp; - mc9328sid = SIDR; GPCR = 0x000003AB; /* I/O pad driving strength */ @@ -107,8 +106,8 @@ int board_early_init_f(void) GIUS (0) &= 0xFF3FFFFF; GPR (0) &= 0xFF3FFFFF; - tmp = *(unsigned int *) (0x1500000C); - tmp = *(unsigned int *) (0x1500000C); + readl(0x1500000C); + readl(0x1500000C); SetAsynchMode (); diff --git a/board/mx1ads/syncflash.c b/board/mx1ads/syncflash.c index 7331efa956..61a882e00b 100644 --- a/board/mx1ads/syncflash.c +++ b/board/mx1ads/syncflash.c @@ -57,7 +57,7 @@ flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips /* Get Status register */ u32 SF_SR(void) { - u32 tmp,tmp1; + u32 tmp; reg_SFCTL = CMD_PROGRAM; tmp = __REG(CONFIG_SYS_FLASH_BASE); @@ -65,7 +65,7 @@ u32 SF_SR(void) { reg_SFCTL = CMD_NORMAL; reg_SFCTL = CMD_LCR; /* Activate LCR Mode */ - tmp1 = __REG(CONFIG_SYS_FLASH_BASE + LCR_SR_CLEAR); + __REG(CONFIG_SYS_FLASH_BASE + LCR_SR_CLEAR); return tmp; } @@ -93,10 +93,10 @@ u8 SF_Ready(void) { /* Issue the precharge all command */ void SF_PrechargeAll(void) { - u32 tmp; - - reg_SFCTL = CMD_PREC; /* Set Precharge Command */ - tmp = __REG(CONFIG_SYS_FLASH_BASE + SYNCFLASH_A10); /* Issue Precharge All Command */ + /* Set Precharge Command */ + reg_SFCTL = CMD_PREC; + /* Issue Precharge All Command */ + __REG(CONFIG_SYS_FLASH_BASE + SYNCFLASH_A10); } /* set SyncFlash to normal mode */ @@ -109,13 +109,12 @@ void SF_Normal(void) { /* Erase SyncFlash */ void SF_Erase(u32 RowAddress) { - u32 tmp; reg_SFCTL = CMD_NORMAL; - tmp = __REG(RowAddress); + __REG(RowAddress); reg_SFCTL = CMD_PREC; - tmp = __REG(RowAddress); + __REG(RowAddress); reg_SFCTL = CMD_LCR; /* Set LCR mode */ __REG(RowAddress + LCR_ERASE_CONFIRM) = 0; /* Issue Erase Setup Command */ @@ -152,7 +151,6 @@ void SF_NvmodeWrite(void) { ulong flash_init(void) { int i, j; - u32 tmp; /* Turn on CSD1 for negating RESETSF of SyncFLash */ @@ -160,7 +158,7 @@ ulong flash_init(void) { udelay(200); reg_SFCTL = CMD_LMR; /* Set Load Mode Register Command */ - tmp = __REG(MODE_REG_VAL); /* Issue Load Mode Register Command */ + __REG(MODE_REG_VAL); /* Issue Load Mode Register Command */ SF_Normal(); diff --git a/board/ronetix/pm9263/pm9263.c b/board/ronetix/pm9263/pm9263.c index b0f7ea6ddb..335efba8ed 100644 --- a/board/ronetix/pm9263/pm9263.c +++ b/board/ronetix/pm9263/pm9263.c @@ -164,7 +164,6 @@ void lcd_disable(void) /* Initialize the PSRAM memory */ static int pm9263_lcd_hw_psram_init(void) { - volatile uint16_t x; unsigned long csa; struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC1; struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; @@ -196,14 +195,14 @@ static int pm9263_lcd_hw_psram_init(void) at91_set_pio_value(PSRAM_CRE_PIN, 0); /* set PSRAM_CRE_PIN to '0' */ /* PSRAM: write BCR */ - x = readw(PSRAM_CTRL_REG); - x = readw(PSRAM_CTRL_REG); + readw(PSRAM_CTRL_REG); + readw(PSRAM_CTRL_REG); writew(1, PSRAM_CTRL_REG); /* 0 - RCR,1 - BCR */ writew(0x9d4f, PSRAM_CTRL_REG); /* write the BCR */ /* write RCR of the PSRAM */ - x = readw(PSRAM_CTRL_REG); - x = readw(PSRAM_CTRL_REG); + readw(PSRAM_CTRL_REG); + readw(PSRAM_CTRL_REG); writew(0, PSRAM_CTRL_REG); /* 0 - RCR,1 - BCR */ /* set RCR; 0x10-async mode,0x90-page mode */ writew(0x90, PSRAM_CTRL_REG); @@ -222,8 +221,8 @@ static int pm9263_lcd_hw_psram_init(void) at91_set_pio_value(PSRAM_CRE_PIN, 1); /* set PSRAM_CRE_PIN to '1' */ /* write RCR of the PSRAM */ - x = readw(PSRAM_CTRL_REG); - x = readw(PSRAM_CTRL_REG); + readw(PSRAM_CTRL_REG); + readw(PSRAM_CTRL_REG); writew(0, PSRAM_CTRL_REG); /* 0 - RCR,1 - BCR */ /* set RCR;0x10-async mode,0x90-page mode */ writew(0x90, PSRAM_CTRL_REG); diff --git a/board/xaeniax/flash.c b/board/xaeniax/flash.c index 6cb0acaa79..836c87e1a9 100644 --- a/board/xaeniax/flash.c +++ b/board/xaeniax/flash.c @@ -220,7 +220,7 @@ static ulong flash_get_size (FPW *addr, flash_info_t *info) int flash_erase (flash_info_t *info, int s_first, int s_last) { - int flag, prot, sect; + int prot, sect; ulong type, start; int rcode = 0; @@ -255,7 +255,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) } /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts (); + disable_interrupts(); /* Start erase on unprotected sectors */ for (sect = s_first; sect <= s_last; sect++) { @@ -389,7 +389,6 @@ static int write_data (flash_info_t *info, ulong dest, FPW data) { FPWV *addr = (FPWV *) dest; ulong status; - int flag; ulong start; /* Check if Flash is (sufficiently) erased */ @@ -398,7 +397,7 @@ static int write_data (flash_info_t *info, ulong dest, FPW data) return (2); } /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts (); + disable_interrupts(); *addr = (FPW) 0x00400040; /* write setup */ *addr = data; |