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authorMario Six <mario.six@gdsys.cc>2019-01-21 09:17:53 +0100
committerMario Six <mario.six@gdsys.cc>2019-05-21 07:52:06 +0200
commitff3bb0c435e0d10ccb61a8fd2dada3ae72f1f97e (patch)
treedad255071cc1ca17121a6dd44ee66688e09ac0fe /board
parent0f06f57c280eaec528c76ebfca9b22aa181ca8be (diff)
mpc83xx: Get rid of CONFIG_83XX_CLKIN
MPC83xx uses CONFIG_83XX_CLKIN instead of CONFIG_SYS_CLK_FREQ to set the system clock. To migrate the architecture, we can replace CONFIG_83XX_CLKIN with CONFIG_SYS_CLK_FREQ. To do this * replace all occurrences of CONFIG_83XX_CLKIN with CONFIG_SYS_CLK_FREQ * set CONFIG_SYS_CLK_FREQ to the old value of CONFIG_83XX_CLKIN in all MPC83xx config files Signed-off-by: Mario Six <mario.six@gdsys.cc>
Diffstat (limited to 'board')
-rw-r--r--board/freescale/mpc8349emds/MAINTAINERS1
-rw-r--r--board/freescale/mpc837xerdb/MAINTAINERS1
-rw-r--r--board/tqc/tqm834x/pci.c2
3 files changed, 3 insertions, 1 deletions
diff --git a/board/freescale/mpc8349emds/MAINTAINERS b/board/freescale/mpc8349emds/MAINTAINERS
index b676c07492..0719225671 100644
--- a/board/freescale/mpc8349emds/MAINTAINERS
+++ b/board/freescale/mpc8349emds/MAINTAINERS
@@ -5,3 +5,4 @@ F: board/freescale/mpc8349emds/
F: include/configs/MPC8349EMDS.h
F: configs/MPC8349EMDS_defconfig
F: configs/MPC8349EMDS_SDRAM_defconfig
+F: configs/MPC8349EMDS_SLAVE_defconfig
diff --git a/board/freescale/mpc837xerdb/MAINTAINERS b/board/freescale/mpc837xerdb/MAINTAINERS
index 81b4eed5ed..9f44a37a0d 100644
--- a/board/freescale/mpc837xerdb/MAINTAINERS
+++ b/board/freescale/mpc837xerdb/MAINTAINERS
@@ -4,3 +4,4 @@ S: Maintained
F: board/freescale/mpc837xerdb/
F: include/configs/MPC837XERDB.h
F: configs/MPC837XERDB_defconfig
+F: configs/MPC837XERDB_SLAVE_defconfig
diff --git a/board/tqc/tqm834x/pci.c b/board/tqc/tqm834x/pci.c
index 34c68ac463..c9b05e44c2 100644
--- a/board/tqc/tqm834x/pci.c
+++ b/board/tqc/tqm834x/pci.c
@@ -71,7 +71,7 @@ pci_init_board(void)
reg32 = 0xff000000;
#endif
if (clk->spmr & SPMR_CKID) {
- /* PCI Clock is half CONFIG_83XX_CLKIN so need to set up OCCR
+ /* PCI Clock is half CONFIG_SYS_CLK_FREQ so need to set up OCCR
* fields accordingly */
reg32 |= (OCCR_PCI1CR | OCCR_PCI2CR);