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authorAng, Chee Hong <chee.hong.ang@intel.com>2019-05-03 01:19:08 -0700
committerMarek Vasut <marex@denx.de>2019-05-06 12:44:45 +0200
commita03e9d9fe5e2645be1c053b2765cfe6a9126d362 (patch)
tree7bd7bbed5c8f5dbbee3934e8484a22f7c89b4248 /cmd/dataflash_mmc_mux.c
parent6bf238a46192bf9164da4548178d657dde4e1c96 (diff)
ARM: socfpga: stratix10: Disable FPGA2SOC reset
Software must never reset FPGA2SOC bridge. This bridge must only be reset by POR/COLD/WARM reset. Asserting the FPGA2SOC reset by software can cause the SoC to lock-up if there are traffics being drived into FPGA2SOC bridge. Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
Diffstat (limited to 'cmd/dataflash_mmc_mux.c')
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