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author | Quentin Schulz <quentin.schulz@bootlin.com> | 2018-08-31 16:28:31 +0200 |
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committer | Tom Rini <trini@konsulko.com> | 2018-09-25 21:49:18 -0400 |
commit | 484a878273539949c1dd97ad0e4c97c35acac87a (patch) | |
tree | 825cec0d016f905bc0adf4a28cece89e5143acf5 /cmd/mtdparts.c | |
parent | ac47fbee6ddd3cc50869d6e46f24f85ff59a5b0a (diff) |
arm: spear: fix enabling of SSP2 clock
The SSP2 clock is at bit 6 in the register, so the value is 0x40 unlike
the current 0x70 which enables the clock of UART2, SSP1 and SSP2.
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Acked-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'cmd/mtdparts.c')
0 files changed, 0 insertions, 0 deletions