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| author | Michal Simek <michal.simek@xilinx.com> | 2018-10-17 12:16:12 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2018-11-07 10:07:31 +0100 |
| commit | acb83bb3ec4fd7f52c600244daa5d8caa53a4924 (patch) | |
| tree | 915e01c99bc5346e74251e28e98315412a6df26f /cmd/sata.c | |
| parent | dd610e616cceda16a81dfa6f9a134877f783548c (diff) | |
arm: zynq: Setup non zero SPL FIT load address
Default setup is 0 which is incorrect place because it points to OCM
which is allocated for SPL only in our case.
Use address in DDR.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'cmd/sata.c')
0 files changed, 0 insertions, 0 deletions