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authorStefan Mavrodiev <stefan@olimex.com>2019-07-31 16:15:52 +0300
committerJagan Teki <jagan@amarulasolutions.com>2019-10-25 14:15:49 +0530
commite6467df1eb3acc238c14a712c46c41bd5c9b1e52 (patch)
treea088f86ec836fef5c02de9bb011ef4a10d6821aa /cmd/wol.c
parent4ed293ae794b42ca216c53706d9476c3f3126197 (diff)
sunxi: Fix pll1 clock calculation
clock_sun6i.c is used for sun6i, sun8i and sun50i SoC families. PLL1 clock sets the default system clock, defined as: sun6i: 1008000000 sun8i: 1008000000 sun50i: 816000000 With the current calculation, m = 2 and k = 3. Solving for n, this results 28. Solving back: (24MHz * 28 * 3) / 2 = 1008MHz However if the requested clock is 816, n is 22.66 rounded to 22, which results: (24MHz * 28 * 3) / 2 = 792MHz Changing k to 4 satisfies both system clocks: (24E6 * 21 * 4) / 2 = 1008MHz (24E6 * 17 * 4) / 2 = 816MHz Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Diffstat (limited to 'cmd/wol.c')
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