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authorStefan Agner <stefan@agner.ch>2016-05-05 13:42:45 -0700
committerStefano Babic <sbabic@denx.de>2016-05-17 17:52:20 +0200
commitf716bf11f3f96e487772d9e47d413c7b30f26b6c (patch)
tree45f3b444c87c760e5bf611cb30cde4cc72bfe4ea /common/bootretry.c
parent1fb51333952ec59fb83312c777bb3665e68f818d (diff)
imx: imx7d: fix ahb clock mux 1
The clock parent of the AHB root clock when using mux option 1 is the SYS PLL 270MHz clock. This is specified in Table 5-11 Clock Root Table of the i.MX 7Dual Applications Processor Reference Manual. While it could be a documentation error, the 270MHz parent is also mentioned in the boot ROM configuration in Table 6-28: The clock is by default at 135MHz due to a POST_PODF value of 1 (=> divider of 2). Signed-off-by: Stefan Agner <stefan@agner.ch>
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