diff options
| author | Lukasz Majewski <lukma@denx.de> | 2019-04-01 16:00:05 +0200 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2019-04-02 13:44:18 +0200 |
| commit | da60b4301c77fdc0ce16a4f6fb6dc04b69b6282c (patch) | |
| tree | 2cf5e280f883825ee0f71ca44a376a643241a45d /configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig | |
| parent | 8e2b1f2251b4935f6e1b6619ab7421e0600e259c (diff) | |
DTS: Fix ETH PHY reset on HSC|DDC boards (imx53)
After the commit: "eth: dm: fec: Add gpio phy reset binding"
SHA1: efd0b791069af93e9d439a70d1fe2ae8994dbbfa
The FEC ETH driver switched to PHY GPIO reset performed with data defined
in DTS.
For the HSC|DDC boards the GPIO reset signal is active low and hence the
wrong DTS description must be changed (otherwise the reset for ETH is not
properly setup).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Diffstat (limited to 'configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig')
0 files changed, 0 insertions, 0 deletions