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| author | Brock Zheng Techyauld Ltd <yzheng@techyauld.com> | 2017-06-06 09:06:21 +0800 |
|---|---|---|
| committer | Jaehoon Chung <jh80.chung@samsung.com> | 2017-06-09 20:25:16 +0900 |
| commit | abf54bf978ed9932d69ee7f937012398d0d8d08f (patch) | |
| tree | abaefb891099fae50bd9f59893e9bc713044d9fe /configs/M54455EVB_stm33_defconfig | |
| parent | 2dd9dc02a3fa1f8c244482e180415d19a5ead929 (diff) | |
Fixup bug in PMIC TPS65217 register address definition
The addresses of the registers in TI TPS65217 are not continuous.
There is a gap between ENABLE(0x16) and DEFUVLO(0x18). No 0x17
register available.
Fixup the enum values by adding a 'reserved' placeholder to correct
the addresses higher than 0x17.
Series-to: Heiko Schocher <hs@denx.de>
Signed-off-by: Brock Zheng Techyauld Ltd <yzheng@techyauld.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Diffstat (limited to 'configs/M54455EVB_stm33_defconfig')
0 files changed, 0 insertions, 0 deletions