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| author | Marek Vasut <marek.vasut+renesas@gmail.com> | 2019-02-19 19:32:28 +0100 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2019-02-25 16:07:41 +0100 |
| commit | ba41c45ec3402178520ca59d5d847c1c94ae25c4 (patch) | |
| tree | 9c78886d07fe5a6f15257d4ad4f96bd39459cf1d /configs/P1010RDB-PB_36BIT_NOR_defconfig | |
| parent | 5d6888418c1185a00eda01349b03b56b03cefda5 (diff) | |
mmc: renesas: Unconditionally set DTCNTL TAPNUM to 8
According to latest specification rev.0026 and after confirmation with
HW engineer, the DTCNTL register TAPNUM field must be set to 8 even on
H3 ES2.0 SoC. Make it so.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'configs/P1010RDB-PB_36BIT_NOR_defconfig')
0 files changed, 0 insertions, 0 deletions