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| author | Marek Vasut <marek.vasut@gmail.com> | 2017-09-12 19:09:31 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2017-09-26 10:57:53 +0200 |
| commit | 72443c7f7d2174903e73ee88dcb4364e0387bbb2 (patch) | |
| tree | 2444e445363b16d59c133d1b2aa4a05917033642 /configs/P1010RDB-PB_NAND_SECBOOT_defconfig | |
| parent | 1ec0a37e1cf2add5680b8d7305922c8210c3e2ed (diff) | |
mtd: cfi: Add support for status register polling
The status register is optional in the AMD command sets, but it's
presence can be checked by reading out CFI table entry 0xc bit 0.
If the register is present, prefer using it's bit 7 to determine
if the flash is busy over reading the flash ; this is needed ie.
on Hyperflash memories.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'configs/P1010RDB-PB_NAND_SECBOOT_defconfig')
0 files changed, 0 insertions, 0 deletions