Merge git://git.denx.de/u-boot-mpc83xx

- Update MPC83xx platform support to current best practices, etc.

1 files changed, 121 insertions, 0 deletions

diff --git a/configs/ids8313_defconfig b/configs/ids8313_defconfig
index 0d055e395d..d9b1642671 100644
--- a/configs/ids8313_defconfig
+++ b/configs/ids8313_defconfig
@@ -1,7 +1,81 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xFFF00000
+CONFIG_SYS_CLK_FREQ=66000000
 CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
 CONFIG_TARGET_IDS8313=y
+CONFIG_SYS_IMMR=0xF0000000
+CONFIG_CORE_PLL_RATIO_2_1=y
+CONFIG_PCI_HOST_MODE_ENABLE=y
+CONFIG_BOOT_ROM_INTERFACE_GPCM_8BIT=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="INITRAM"
+CONFIG_BAT1_BASE=0xFD000000
+CONFIG_BAT1_LENGTH_256_KBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_GUARDED=y
+CONFIG_BAT1_DCACHE_GUARDED=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="FLASH"
+CONFIG_BAT2_BASE=0xFF800000
+CONFIG_BAT2_LENGTH_8_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_GUARDED=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="IMMR"
+CONFIG_BAT5_BASE=0xF0000000
+CONFIG_BAT5_LENGTH_128_MBYTES=y
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_ICACHE_INHIBITED=y
+CONFIG_BAT5_ICACHE_GUARDED=y
+CONFIG_BAT5_DCACHE_INHIBITED=y
+CONFIG_BAT5_DCACHE_GUARDED=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT6=y
+CONFIG_BAT6_NAME="NAND_MRAM_CPLD"
+CONFIG_BAT6_BASE=0xE0000000
+CONFIG_BAT6_LENGTH_256_MBYTES=y
+CONFIG_BAT6_ACCESS_RW=y
+CONFIG_BAT6_ICACHE_GUARDED=y
+CONFIG_BAT6_DCACHE_GUARDED=y
+CONFIG_BAT6_USER_MODE_VALID=y
+CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
+CONFIG_NAND_LBLAWBAR_PRELIM_1=y
+CONFIG_LBLAW0=y
+CONFIG_LBLAW0_BASE=0xFF800000
+CONFIG_LBLAW0_NAME="FLASH"
+CONFIG_LBLAW0_LENGTH_8_MBYTES=y
+CONFIG_LBLAW1=y
+CONFIG_LBLAW1_BASE=0xE1000000
+CONFIG_LBLAW1_NAME="NAND"
+CONFIG_LBLAW1_LENGTH_32_KBYTES=y
+CONFIG_LBLAW2=y
+CONFIG_LBLAW2_BASE=0xE2000000
+CONFIG_LBLAW2_NAME="MRAM"
+CONFIG_LBLAW2_LENGTH_128_KBYTES=y
+CONFIG_LBLAW3=y
+CONFIG_LBLAW3_BASE=0xE3000000
+CONFIG_LBLAW3_NAME="CPLD"
+CONFIG_LBLAW3_LENGTH_32_KBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
+CONFIG_ACR_PIPE_DEP_4=y
+CONFIG_ACR_RPTCNT_4=y
 CONFIG_FIT=y
 CONFIG_FIT_SIGNATURE=y
 CONFIG_IMAGE_FORMAT_LEGACY=y
@@ -51,3 +125,50 @@ CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_MPC8XXX_SPI=y
 CONFIG_OF_LIBFDT=y
+CONFIG_ELBC_BR0_OR0=y
+CONFIG_BR0_OR0_NAME="FLASH"
+CONFIG_BR0_OR0_BASE=0xFF800000
+CONFIG_BR0_MACHINE_GPCM=y
+CONFIG_BR0_PORTSIZE_8BIT=y
+CONFIG_OR0_AM_8_MBYTES=y
+CONFIG_OR0_CSNT_EARLIER=y
+CONFIG_OR0_EAD_EXTRA=y
+CONFIG_OR0_SCY_10=y
+CONFIG_OR0_TRLX_RELAXED=y
+CONFIG_OR0_EHTR_8_CYCLE=y
+CONFIG_ELBC_BR1_OR1=y
+CONFIG_BR1_OR1_NAME="NAND"
+CONFIG_BR1_OR1_BASE=0xE1000000
+CONFIG_BR1_ERRORCHECKING_BOTH=y
+CONFIG_BR1_MACHINE_FCM=y
+CONFIG_BR1_PORTSIZE_8BIT=y
+CONFIG_OR1_AM_32_KBYTES=y
+CONFIG_OR1_PGS_LARGE=y
+CONFIG_OR1_RST_ONE_CLOCK=y
+CONFIG_OR1_SCY_4=y
+CONFIG_OR1_TRLX_RELAXED=y
+CONFIG_OR1_CHT_TWO_CLOCK=y
+CONFIG_OR1_CSCT_8_CYCLE=y
+CONFIG_OR1_CST_ONE_CLOCK=y
+CONFIG_OR1_EHTR_8_CYCLE=y
+CONFIG_ELBC_BR2_OR2=y
+CONFIG_BR2_OR2_NAME="MRAM"
+CONFIG_BR2_OR2_BASE=0xE2000000
+CONFIG_BR2_MACHINE_GPCM=y
+CONFIG_BR2_PORTSIZE_8BIT=y
+CONFIG_OR2_AM_128_KBYTES=y
+CONFIG_OR2_ACS_QUARTER_CYCLE_EARLIER=y
+CONFIG_OR2_CSNT_EARLIER=y
+CONFIG_OR2_SCY_7=y
+CONFIG_OR2_TRLX_RELAXED=y
+CONFIG_ELBC_BR3_OR3=y
+CONFIG_BR3_OR3_NAME="CPLD"
+CONFIG_BR3_OR3_BASE=0xE3000000
+CONFIG_BR3_MACHINE_GPCM=y
+CONFIG_BR3_PORTSIZE_8BIT=y
+CONFIG_OR3_AM_32_KBYTES=y
+CONFIG_OR3_CSNT_EARLIER=y
+CONFIG_OR3_SCY_1=y
+CONFIG_OR3_TRLX_RELAXED=y
+CONFIG_LCRR_EADC_1=y
+CONFIG_LCRR_CLKDIV_2=y