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author | Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> | 2018-03-22 13:50:47 +0300 |
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committer | Jagan Teki <jagan@amarulasolutions.com> | 2018-03-22 23:01:35 +0530 |
commit | 4b5f6c52e78d43710a0d062e31de741ec76ceea1 (patch) | |
tree | 8a9c1b2cd619427402cf7a426c53d7a32cd7dfb6 /configs/ls1021atwr_qspi_defconfig | |
parent | bcdcb3e61ebd0550355883aed3978028d0e7778b (diff) |
DW SPI: use 32 bit access instead of 16 and 32 bit mix
Current DW SPI driver uses 32 bit access for some registers and
16 bit access for others. So if DW SPI IP is connected via bus
which doesn't support 16 bit access we will get bus error.
Fix that by switching to 32 bit access only instead of 16 and 32 bit mix
Additional Documentation to Support this Change:
The DW_apb_ssi databook states:
"All registers in the DW_apb_ssi are addressed at 32-bit boundaries
to remain consistent with the AHB bus. Where the physical size of
any register is less than 32-bits wide, the upper unused bits of
the 32-bit boundary are reserved. Writing to these bits has no
effect; reading from these bits returns 0." [1]
[1] Section 6.1 of dw_apb_ssi.pdf (version 3.22a)
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Diffstat (limited to 'configs/ls1021atwr_qspi_defconfig')
0 files changed, 0 insertions, 0 deletions