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author | Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> | 2017-12-28 15:09:03 +0300 |
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committer | Jagan Teki <jagan@amarulasolutions.com> | 2018-01-26 11:26:16 +0530 |
commit | 58c125b9e2b232ce73ed7b24ba7b1ca5ff41c5bd (patch) | |
tree | 981b8163fb8e6208b30e808068033352927164ca /configs/netgear_cg3100d_ram_defconfig | |
parent | 21143ce127b953356bd6174fb4e4892af3a92d0f (diff) |
DW SPI: Get clock value from Device Tree
Add option to set spi controller clock frequency via device tree
using standard clock bindings.
Define dw_spi_get_clk function as 'weak' as some targets
(like SOCFPGA_GEN5 and SOCFPGA_ARRIA10) don't use standard clock API
and implement dw_spi_get_clk their own way in their clock manager.
Get rid of clock_manager.h include as we don't use
cm_get_spi_controller_clk_hz function anymore. (we use redefined
dw_spi_get_clk in SOCFPGA clock managers instead)
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Diffstat (limited to 'configs/netgear_cg3100d_ram_defconfig')
0 files changed, 0 insertions, 0 deletions