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author | Marek Vasut <marex@denx.de> | 2018-08-06 21:47:50 +0200 |
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committer | Marek Vasut <marex@denx.de> | 2018-08-13 22:35:42 +0200 |
commit | 49e508e962df731590c3785af0d94493864c61ff (patch) | |
tree | 7d34cc991f680217fba88bc9d774fe31fc1f3b52 /configs/rsk7264_defconfig | |
parent | 934aec71d6491ed3e5555f92255613dfdf402aa8 (diff) |
ARM: socfpga: clk: Make L4SP and MMC clock calculation Gen5 only
The L4SP and MMC clock precalculation is specific to Gen5, it is not
needed on Arria10/Stratix10. Isolate it to Gen5 until there is a proper
clock driver for Gen5, at which point this will go away completely.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'configs/rsk7264_defconfig')
0 files changed, 0 insertions, 0 deletions