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authorJagan Teki <jagan@amarulasolutions.com>2019-12-30 17:34:07 +0530
committerStefano Babic <sbabic@denx.de>2020-01-07 10:26:57 +0100
commitf838ebfe5a80a134c7df0c135431169f30bef7dc (patch)
tree61763719c32c2484475046dbb3a70f720027a404 /configs/socfpga_de10_nano_defconfig
parentd159b0236b2a8f43ce2d2c69d4838cb1dbf10598 (diff)
ARM: dts: imx6q-icore-mipi: Use 1.5 version of i.Core MX6DL
The EDIMM STARTER KIT i.Core 1.5 MIPI Evaluation is based on the 1.5 version of the i.Core MX6 cpu module. The 1.5 version differs from the original one for a few details, including the ethernet PHY interface clock provider. With this commit, the ethernet interface works properly: SMSC LAN8710/LAN8720 2188000.ethernet-1:00: attached PHY driver While before using the 1.5 version, ethernet failed to startup do to un-clocked PHY interface: fec 2188000.ethernet eth0: could not attach to PHY Similar fix has merged for i.Core MX6Q but missed to update for DL. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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