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| author | Michal Simek <michal.simek@xilinx.com> | 2020-02-13 15:03:29 +0100 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2020-04-06 12:51:31 +0200 |
| commit | f7c6ee7fe7bcc387de4c92300f46cb725b845b53 (patch) | |
| tree | 87933ddcfed66aaa2dd621f058a5b35978613769 /configs/xilinx_zynq_virt_defconfig | |
| parent | dacec83ce0f8c80b35ed9b4e18f4468ff8552069 (diff) | |
ARM: zynq: Switch to single zynq configurations
There are a lot of zynq configurations which can be merged together and use
only one for all. The similar change has been done for ZynqMP by commit
be1b6c32d940 ("arm64: zynqmp: Use zynqmp_virt platform")
Build SPL with u-boot.img for zc706 like this.
export DEVICE_TREE=zynq-zc706 && make xilinx_zynq_virt_defconfig && make -j8
u-boot.img is generic for all boards.
Tested on Zybo, zc702, zc706, zc770-xm011-x16, cc108 and microzed.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'configs/xilinx_zynq_virt_defconfig')
| -rw-r--r-- | configs/xilinx_zynq_virt_defconfig | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index ece619f239..2e9f3a0f75 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -11,13 +11,17 @@ CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds" CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_PRINT=y +CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_USE_PREBOOT=y CONFIG_SPL_STACK_R=y +CONFIG_SPL_FPGA_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 # CONFIG_BOOTM_NETBSD is not set +CONFIG_CMD_IMLS=y CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y @@ -28,12 +32,14 @@ CONFIG_CMD_FPGA_LOADP=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_NAND_LOCK_UNLOCK=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TFTPPUT=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4_WRITE=y -CONFIG_OF_BOARD=y +CONFIG_DEFAULT_DEVICE_TREE="zynq-zc706" +CONFIG_OF_LIST="zynq-zc702 zynq-zc706 zynq-zc770-xm010 zynq-zc770-xm011 zynq-zc770-xm011-x16 zynq-zc770-xm012 zynq-zc770-xm013 zynq-cc108 zynq-microzed zynq-minized zynq-picozed zynq-zed zynq-zturn zynq-zybo zynq-zybo-z7 zynq-dlc20-rev1.0" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y @@ -52,11 +58,19 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x0 CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0 CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y +CONFIG_MTD=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y +CONFIG_MTD_RAW_NAND=y +CONFIG_NAND_ZYNQ=y CONFIG_SF_DEFAULT_SPEED=30000000 CONFIG_SPI_FLASH_ISSI=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHY_MARVELL=y CONFIG_PHY_REALTEK=y @@ -64,6 +78,7 @@ CONFIG_PHY_XILINX=y CONFIG_MII=y CONFIG_ZYNQ_GEM=y CONFIG_ZYNQ_SERIAL=y +CONFIG_ZYNQ_SPI=y CONFIG_ZYNQ_QSPI=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y @@ -76,3 +91,5 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_THOR=y +CONFIG_DISPLAY=y +CONFIG_SPL_GZIP=y |