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authorTom Rini <trini@konsulko.com>2017-11-29 08:26:07 -0500
committerTom Rini <trini@konsulko.com>2017-11-29 08:26:07 -0500
commitb06c46de632c55f4c39d404c6f0f65e414b31050 (patch)
treedea1702529c8d33c5e70eb5eb6ecf7d08eed23b9 /configs/xilinx_zynqmp_zcu102_revA_defconfig
parentfcc8250c2f7c982f3593a8eecf737f8e2c95f222 (diff)
parenta04a5daae25a74ad2ac90b66667dac126242baa0 (diff)
Merge tag 'xilinx-for-v2018.01' of git://www.denx.de/git/u-boot-microblaze
Xilinx changes for v2018.1 Zynq: - Add support for Syzygy and cc108 boards - Add support for mini u-boot configurations (cse) - dts updates - config/defconfig updates in connection to Kconfig changes - Fix psu_init handling ZynqMP: - SPL fixes - Remove slcr.c - Fixing r5 startup sequence - Add support for external pmufw - Add support for new ZynqMP chips - dts updates - Add support for zcu102 rev1.0 board Drivers: - nand: Support external timing setting and board init - ahci: Fix wording - axi_emac: Wait for bit, non processor mode, readl/write conversion - zynq_gem: Fix SGMII/PCS support
Diffstat (limited to 'configs/xilinx_zynqmp_zcu102_revA_defconfig')
-rw-r--r--configs/xilinx_zynqmp_zcu102_revA_defconfig3
1 files changed, 2 insertions, 1 deletions
diff --git a/configs/xilinx_zynqmp_zcu102_revA_defconfig b/configs/xilinx_zynqmp_zcu102_revA_defconfig
index d8c79e03b3..80c5e49348 100644
--- a/configs/xilinx_zynqmp_zcu102_revA_defconfig
+++ b/configs/xilinx_zynqmp_zcu102_revA_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zcu102"
CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
-CONFIG_IDENT_STRING=" Xilinx ZynqMP ZCU102"
+CONFIG_IDENT_STRING=" Xilinx ZynqMP ZCU102 revA"
CONFIG_ZYNQMP_USB=y
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102-revA"
CONFIG_DEBUG_UART=y
@@ -65,6 +65,7 @@ CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xff000000
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ZYNQ_SERIAL=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y