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author | Marek Vasut <marex@denx.de> | 2020-08-05 15:30:43 +0200 |
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committer | Stefano Babic <sbabic@denx.de> | 2020-08-17 17:55:49 +0200 |
commit | af50d92ae75cae41dfc330daaad0f8f35a051c78 (patch) | |
tree | 5756b5e8c2f1b0760a9b6e8c15f3a3997b84bf1f /configs/zc5601_defconfig | |
parent | 4b44bea701a67e3b83cb82f44fa40485b111d394 (diff) |
ARM: imx: ddr: Add deskew register programming
Fill is code for programming the DDR_PHY_CMD_DESKEW_CONx registers,
which are optional, but can be used to fill in the byte lane delays.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'configs/zc5601_defconfig')
0 files changed, 0 insertions, 0 deletions