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authorTom Rini <trini@konsulko.com>2017-12-18 12:23:27 -0500
committerTom Rini <trini@konsulko.com>2017-12-18 12:23:27 -0500
commit90d75d2efc376094b50d84de80e9cb8b3bcae032 (patch)
treea5bcce535313c824bca832b9b9ccbc7f870d35fa /configs/zynq_cc108_defconfig
parenta9e670d46f1916d6fb925244d5d4c9a48db8e26b (diff)
parent3e229a83bd4190f99731992d3a56983f29313899 (diff)
Merge tag 'xilinx-for-v2018.01-rc2-v2' of git://www.denx.de/git/u-boot-microblaze
Xilinx changes for v2018.01-rc2-v2 fpga: - Enable loading bitstream via fit image for !xilinx platforms zynq: - Fix SPL SD boot mode zynqmp: - Not not reset in panic - Do not use simple allocator because of fat changes - Various dt chagnes - modeboot variable setup - Fix fpga loading on automotive devices - Fix coverity issues test: - Fix env test for !hush case - Stephen's patch
Diffstat (limited to 'configs/zynq_cc108_defconfig')
-rw-r--r--configs/zynq_cc108_defconfig2
1 files changed, 2 insertions, 0 deletions
diff --git a/configs/zynq_cc108_defconfig b/configs/zynq_cc108_defconfig
index fcf4635e3d..bdba0d1cc9 100644
--- a/configs/zynq_cc108_defconfig
+++ b/configs/zynq_cc108_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_ZYNQ=y
CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_SPL_STACK_R_ADDR=0x200000
CONFIG_DEFAULT_DEVICE_TREE="zynq-cc108"
CONFIG_DEBUG_UART=y
CONFIG_FIT=y
@@ -8,6 +9,7 @@ CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
CONFIG_CMD_BOOTZ=y