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authorWolfgang Denk <wd@pollux.denx.de>2006-03-13 12:37:35 +0100
committerWolfgang Denk <wd@pollux.denx.de>2006-03-13 12:37:35 +0100
commitff7fefe6797246b2748530f965f2e41de34a982a (patch)
tree11a2822c35a388ac1d00a43875e8c76508b97955 /cpu/arm926ejs/omap/reset.S
parent86f5f0342d1d2c787d984ecb9135db993e3a9f6a (diff)
Apply SoC concept to arm926ejs CPUs, i.e. move the SoC specific timer and
cpu_reset code from cpu/$(CPU) into the new cpu/$(CPU)/$(SOC) directories Patch by Andreas Engel, 13 Mar 2006
Diffstat (limited to 'cpu/arm926ejs/omap/reset.S')
-rw-r--r--cpu/arm926ejs/omap/reset.S45
1 files changed, 45 insertions, 0 deletions
diff --git a/cpu/arm926ejs/omap/reset.S b/cpu/arm926ejs/omap/reset.S
new file mode 100644
index 0000000000..e8989028e2
--- /dev/null
+++ b/cpu/arm926ejs/omap/reset.S
@@ -0,0 +1,45 @@
+/*
+ * armboot - Startup Code for ARM926EJS CPU-core
+ *
+ * Copyright (c) 2003 Texas Instruments
+ *
+ * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
+ *
+ * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
+ * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
+ * Copyright (c) 2002 Gary Jennejohn <gj@denx.de>
+ * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
+ * Copyright (c) 2003 Kshitij <kshitij@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+ .align 5
+.globl reset_cpu
+reset_cpu:
+ ldr r1, rstctl1 /* get clkm1 reset ctl */
+ mov r3, #0x0
+ strh r3, [r1] /* clear it */
+ mov r3, #0x8
+ strh r3, [r1] /* force dsp+arm reset */
+_loop_forever:
+ b _loop_forever
+
+rstctl1:
+ .word 0xfffece10