diff options
author | Anders Darander <anders.darander@gmail.com> | 2010-02-25 15:57:03 +0100 |
---|---|---|
committer | Tom Rix <Tom.Rix@windriver.com> | 2010-03-07 12:36:35 -0600 |
commit | cade7d9577d4d17f55404b5e60cd5e5b0b605c31 (patch) | |
tree | 0c26dc39d34abe034f68a4798ace6b4b8e59d0ff /cpu/arm926ejs | |
parent | 5f353484093876d7021f20fa4bd63f82d32941b9 (diff) |
Add bootcount to AT91
Use AT91_GPBR 3 as a bootcount register.
The bootmagic and the bootcount shares AT91_GPBR 3.
Signed-off-by: Anders Darander <ad@datarespons.se>
Diffstat (limited to 'cpu/arm926ejs')
-rw-r--r-- | cpu/arm926ejs/at91/cpu.c | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/cpu/arm926ejs/at91/cpu.c b/cpu/arm926ejs/at91/cpu.c index 1094f8c7f3..141a7d1ec6 100644 --- a/cpu/arm926ejs/at91/cpu.c +++ b/cpu/arm926ejs/at91/cpu.c @@ -35,6 +35,13 @@ #define CONFIG_SYS_AT91_MAIN_CLOCK 0 #endif +/* + * The at91sam9260 has 4 GPBR (0-3), we'll use the last one, nr 3, + * to keep track of the bootcount. + */ +#define AT91_GPBR_BOOTCOUNT_REGISTER 3 +#define AT91_BOOTCOUNT_ADDRESS (AT91_GPBR + 4*AT91_GPBR_BOOTCOUNT_REGISTER) + int arch_cpu_init(void) { return at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK); @@ -56,3 +63,30 @@ int print_cpuinfo(void) return 0; } #endif + +#ifdef CONFIG_BOOTCOUNT_LIMIT +/* + * Just as the mpc5xxx, we combine the BOOTCOUNT_MAGIC and boocount + * in one 32-bit register. This is done, as the AT91SAM9260 only has + * 4 GPBR. + */ +void bootcount_store (ulong a) +{ + volatile ulong *save_addr = + (volatile ulong *)(AT91_BASE_SYS + AT91_BOOTCOUNT_ADDRESS); + + *save_addr = (BOOTCOUNT_MAGIC & 0xffff0000) | (a & 0x0000ffff); +} + +ulong bootcount_load (void) +{ + volatile ulong *save_addr = + (volatile ulong *)(AT91_BASE_SYS + AT91_BOOTCOUNT_ADDRESS); + + if ((*save_addr & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000)) + return 0; + else + return (*save_addr & 0x0000ffff); +} + +#endif /* CONFIG_BOOTCOUNT_LIMIT */ |