Merge branch 'next' of ../master

7 files changed, 276 insertions, 149 deletions

diff --git a/cpu/arm_cortexa8/cpu.c b/cpu/arm_cortexa8/cpu.c
index ca6bf4f234..6fd07d0b73 100644
--- a/cpu/arm_cortexa8/cpu.c
+++ b/cpu/arm_cortexa8/cpu.c
@@ -36,29 +36,12 @@
 #include <asm/arch/sys_proto.h>
 #include <asm/system.h>
 
-#ifdef CONFIG_USE_IRQ
-DECLARE_GLOBAL_DATA_PTR;
-#endif
-
 #ifndef CONFIG_L2_OFF
 void l2cache_disable(void);
 #endif
 
 static void cache_flush(void);
 
-int cpu_init(void)
-{
-	/*
-	 * setup up stacks if necessary
-	 */
-#ifdef CONFIG_USE_IRQ
-	IRQ_STACK_START =
-	    _armboot_start - CONFIG_SYS_MALLOC_LEN - CONFIG_SYS_GBL_DATA_SIZE - 4;
-	FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
-#endif
-	return 0;
-}
-
 int cleanup_before_linux(void)
 {
 	unsigned int i;
diff --git a/cpu/arm_cortexa8/omap3/Makefile b/cpu/arm_cortexa8/omap3/Makefile
index b96b3dd5eb..50176eeb35 100644
--- a/cpu/arm_cortexa8/omap3/Makefile
+++ b/cpu/arm_cortexa8/omap3/Makefile
@@ -26,7 +26,14 @@ include $(TOPDIR)/config.mk
 LIB	=  $(obj)lib$(SOC).a
 
 SOBJS	:= lowlevel_init.o
-COBJS	:= sys_info.o board.o clock.o interrupts.o mem.o syslib.o
+
+COBJS	+= board.o
+COBJS	+= clock.o
+COBJS	+= gpio.o
+COBJS	+= mem.o
+COBJS	+= syslib.o
+COBJS	+= sys_info.o
+COBJS	+= timer.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS) $(SOBJS))
diff --git a/cpu/arm_cortexa8/omap3/board.c b/cpu/arm_cortexa8/omap3/board.c
index 51d5cf636f..6e295994ab 100644
--- a/cpu/arm_cortexa8/omap3/board.c
+++ b/cpu/arm_cortexa8/omap3/board.c
@@ -335,8 +335,8 @@ usage:
 U_BOOT_CMD(
 	nandecc, 2, 1,	do_switch_ecc,
 	"nandecc - switch OMAP3 NAND ECC calculation algorithm\n",
-	"[hw/sw] - Switch between NAND hardware (hw) or software (sw) ecc algorithm\n"
-	);
+	"[hw/sw] - Switch between NAND hardware (hw) or software (sw) ecc algorithm"
+);
 
 #endif /* CONFIG_NAND_OMAP_GPMC */
 
diff --git a/cpu/arm_cortexa8/omap3/clock.c b/cpu/arm_cortexa8/omap3/clock.c
index d035677857..0306b6c067 100644
--- a/cpu/arm_cortexa8/omap3/clock.c
+++ b/cpu/arm_cortexa8/omap3/clock.c
@@ -357,6 +357,28 @@ void per_clocks_enable(void)
 	sr32(&prcm_base->fclken_per, 11, 1, 0x1);
 	sr32(&prcm_base->iclken_per, 11, 1, 0x1);
 #endif
+
+#ifdef CONFIG_OMAP3_GPIO_2
+	sr32(&prcm_base->fclken_per, 13, 1, 1);
+	sr32(&prcm_base->iclken_per, 13, 1, 1);
+#endif
+#ifdef CONFIG_OMAP3_GPIO_3
+	sr32(&prcm_base->fclken_per, 14, 1, 1);
+	sr32(&prcm_base->iclken_per, 14, 1, 1);
+#endif
+#ifdef CONFIG_OMAP3_GPIO_4
+	sr32(&prcm_base->fclken_per, 15, 1, 1);
+	sr32(&prcm_base->iclken_per, 15, 1, 1);
+#endif
+#ifdef CONFIG_OMAP3_GPIO_5
+	sr32(&prcm_base->fclken_per, 16, 1, 1);
+	sr32(&prcm_base->iclken_per, 16, 1, 1);
+#endif
+#ifdef CONFIG_OMAP3_GPIO_6
+	sr32(&prcm_base->fclken_per, 17, 1, 1);
+	sr32(&prcm_base->iclken_per, 17, 1, 1);
+#endif
+
 #ifdef CONFIG_DRIVER_OMAP34XX_I2C
 	/* Turn on all 3 I2C clocks */
 	sr32(&prcm_base->fclken1_core, 15, 3, 0x7);
diff --git a/cpu/arm_cortexa8/omap3/gpio.c b/cpu/arm_cortexa8/omap3/gpio.c
new file mode 100644
index 0000000000..aeb6066d89
--- /dev/null
+++ b/cpu/arm_cortexa8/omap3/gpio.c
@@ -0,0 +1,185 @@
+/*
+ * Copyright (c) 2009 Wind River Systems, Inc.
+ * Tom Rix <Tom.Rix@windriver.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * This work is derived from the linux 2.6.27 kernel source
+ * To fetch, use the kernel repository
+ * git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git
+ * Use the v2.6.27 tag.
+ *
+ * Below is the original's header including its copyright
+ *
+ *  linux/arch/arm/plat-omap/gpio.c
+ *
+ * Support functions for OMAP GPIO
+ *
+ * Copyright (C) 2003-2005 Nokia Corporation
+ * Written by Juha Yrjölä <juha.yrjola@nokia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <common.h>
+#include <asm/arch/gpio.h>
+#include <asm/io.h>
+#include <asm/errno.h>
+
+static struct gpio_bank gpio_bank_34xx[6] = {
+	{ (void *)OMAP34XX_GPIO1_BASE, METHOD_GPIO_24XX },
+	{ (void *)OMAP34XX_GPIO2_BASE, METHOD_GPIO_24XX },
+	{ (void *)OMAP34XX_GPIO3_BASE, METHOD_GPIO_24XX },
+	{ (void *)OMAP34XX_GPIO4_BASE, METHOD_GPIO_24XX },
+	{ (void *)OMAP34XX_GPIO5_BASE, METHOD_GPIO_24XX },
+	{ (void *)OMAP34XX_GPIO6_BASE, METHOD_GPIO_24XX },
+};
+
+static struct gpio_bank *gpio_bank = &gpio_bank_34xx[0];
+
+static inline struct gpio_bank *get_gpio_bank(int gpio)
+{
+	return &gpio_bank[gpio >> 5];
+}
+
+static inline int get_gpio_index(int gpio)
+{
+	return gpio & 0x1f;
+}
+
+static inline int gpio_valid(int gpio)
+{
+	if (gpio < 0)
+		return -1;
+	if (gpio < 192)
+		return 0;
+	return -1;
+}
+
+static int check_gpio(int gpio)
+{
+	if (gpio_valid(gpio) < 0) {
+		printf("ERROR : check_gpio: invalid GPIO %d\n", gpio);
+		return -1;
+	}
+	return 0;
+}
+
+static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
+{
+	void *reg = bank->base;
+	u32 l;
+
+	switch (bank->method) {
+	case METHOD_GPIO_24XX:
+		reg += OMAP24XX_GPIO_OE;
+		break;
+	default:
+		return;
+	}
+	l = __raw_readl(reg);
+	if (is_input)
+		l |= 1 << gpio;
+	else
+		l &= ~(1 << gpio);
+	__raw_writel(l, reg);
+}
+
+void omap_set_gpio_direction(int gpio, int is_input)
+{
+	struct gpio_bank *bank;
+
+	if (check_gpio(gpio) < 0)
+		return;
+	bank = get_gpio_bank(gpio);
+	_set_gpio_direction(bank, get_gpio_index(gpio), is_input);
+}
+
+static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
+{
+	void *reg = bank->base;
+	u32 l = 0;
+
+	switch (bank->method) {
+	case METHOD_GPIO_24XX:
+		if (enable)
+			reg += OMAP24XX_GPIO_SETDATAOUT;
+		else
+			reg += OMAP24XX_GPIO_CLEARDATAOUT;
+		l = 1 << gpio;
+		break;
+	default:
+		printf("omap3-gpio unknown bank method %s %d\n",
+		       __FILE__, __LINE__);
+		return;
+	}
+	__raw_writel(l, reg);
+}
+
+void omap_set_gpio_dataout(int gpio, int enable)
+{
+	struct gpio_bank *bank;
+
+	if (check_gpio(gpio) < 0)
+		return;
+	bank = get_gpio_bank(gpio);
+	_set_gpio_dataout(bank, get_gpio_index(gpio), enable);
+}
+
+int omap_get_gpio_datain(int gpio)
+{
+	struct gpio_bank *bank;
+	void *reg;
+
+	if (check_gpio(gpio) < 0)
+		return -EINVAL;
+	bank = get_gpio_bank(gpio);
+	reg = bank->base;
+	switch (bank->method) {
+	case METHOD_GPIO_24XX:
+		reg += OMAP24XX_GPIO_DATAIN;
+		break;
+	default:
+		return -EINVAL;
+	}
+	return (__raw_readl(reg)
+			& (1 << get_gpio_index(gpio))) != 0;
+}
+
+static void _reset_gpio(struct gpio_bank *bank, int gpio)
+{
+	_set_gpio_direction(bank, get_gpio_index(gpio), 1);
+}
+
+int omap_request_gpio(int gpio)
+{
+	if (check_gpio(gpio) < 0)
+		return -EINVAL;
+
+	return 0;
+}
+
+void omap_free_gpio(int gpio)
+{
+	struct gpio_bank *bank;
+
+	if (check_gpio(gpio) < 0)
+		return;
+	bank = get_gpio_bank(gpio);
+
+	_reset_gpio(bank, gpio);
+}
diff --git a/cpu/arm_cortexa8/omap3/interrupts.c b/cpu/arm_cortexa8/omap3/timer.c
index 742fe9c12b..05cfe763aa 100644
--- a/cpu/arm_cortexa8/omap3/interrupts.c
+++ b/cpu/arm_cortexa8/omap3/timer.c
@@ -34,134 +34,6 @@
 
 #include <common.h>
 #include <asm/io.h>
-#include <asm/proc-armv/ptrace.h>
-
-#ifdef CONFIG_USE_IRQ
-/* enable IRQ interrupts */
-void enable_interrupts(void)
-{
-	unsigned long temp;
-	__asm__ __volatile__("mrs %0, cpsr\n"
-			     "bic %0, %0, #0x80\n" "msr cpsr_c, %0":"=r"(temp)
-			     ::"memory");
-}
-
-/*
- * disable IRQ/FIQ interrupts
- * returns true if interrupts had been enabled before we disabled them
- */
-int disable_interrupts(void)
-{
-	unsigned long old, temp;
-	__asm__ __volatile__("mrs %0, cpsr\n"
-			     "orr %1, %0, #0xc0\n"
-			     "msr cpsr_c, %1":"=r"(old), "=r"(temp)
-			     ::"memory");
-	return (old & 0x80) == 0;
-}
-#else
-void enable_interrupts(void)
-{
-	return;
-}
-int disable_interrupts(void)
-{
-	return 0;
-}
-#endif
-
-void bad_mode(void)
-{
-	panic("Resetting CPU ...\n");
-	reset_cpu(0);
-}
-
-void show_regs(struct pt_regs *regs)
-{
-	unsigned long flags;
-	const char *processor_modes[] = {
-		"USER_26", "FIQ_26", "IRQ_26", "SVC_26",
-		"UK4_26", "UK5_26", "UK6_26", "UK7_26",
-		"UK8_26", "UK9_26", "UK10_26", "UK11_26",
-		"UK12_26", "UK13_26", "UK14_26", "UK15_26",
-		"USER_32", "FIQ_32", "IRQ_32", "SVC_32",
-		"UK4_32", "UK5_32", "UK6_32", "ABT_32",
-		"UK8_32", "UK9_32", "UK10_32", "UND_32",
-		"UK12_32", "UK13_32", "UK14_32", "SYS_32",
-	};
-
-	flags = condition_codes(regs);
-
-	printf("pc : [<%08lx>]    lr : [<%08lx>]\n"
-		"sp : %08lx  ip : %08lx  fp : %08lx\n",
-		instruction_pointer(regs),
-		regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
-	printf("r10: %08lx  r9 : %08lx  r8 : %08lx\n",
-		regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);
-	printf("r7 : %08lx  r6 : %08lx  r5 : %08lx  r4 : %08lx\n",
-		regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4);
-	printf("r3 : %08lx  r2 : %08lx  r1 : %08lx  r0 : %08lx\n",
-		regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);
-	printf("Flags: %c%c%c%c",
-		flags & CC_N_BIT ? 'N' : 'n',
-		flags & CC_Z_BIT ? 'Z' : 'z',
-		flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v');
-	printf("  IRQs %s  FIQs %s  Mode %s%s\n",
-		interrupts_enabled(regs) ? "on" : "off",
-		fast_interrupts_enabled(regs) ? "on" : "off",
-		processor_modes[processor_mode(regs)],
-		thumb_mode(regs) ? " (T)" : "");
-}
-
-void do_undefined_instruction(struct pt_regs *pt_regs)
-{
-	printf("undefined instruction\n");
-	show_regs(pt_regs);
-	bad_mode();
-}
-
-void do_software_interrupt(struct pt_regs *pt_regs)
-{
-	printf("software interrupt\n");
-	show_regs(pt_regs);
-	bad_mode();
-}
-
-void do_prefetch_abort(struct pt_regs *pt_regs)
-{
-	printf("prefetch abort\n");
-	show_regs(pt_regs);
-	bad_mode();
-}
-
-void do_data_abort(struct pt_regs *pt_regs)
-{
-	printf("data abort\n");
-	show_regs(pt_regs);
-	bad_mode();
-}
-
-void do_not_used(struct pt_regs *pt_regs)
-{
-	printf("not used\n");
-	show_regs(pt_regs);
-	bad_mode();
-}
-
-void do_fiq(struct pt_regs *pt_regs)
-{
-	printf("fast interrupt request\n");
-	show_regs(pt_regs);
-	bad_mode();
-}
-
-void do_irq(struct pt_regs *pt_regs)
-{
-	printf("interrupt request\n");
-	show_regs(pt_regs);
-	bad_mode();
-}
-
 
 static ulong timestamp;
 static ulong lastinc;
@@ -178,7 +50,7 @@ static gptimer_t *timer_base = (gptimer_t *)CONFIG_SYS_TIMERBASE;
 #define TIMER_CLOCK	(V_SCLK / (2 << CONFIG_SYS_PTV))
 #define TIMER_LOAD_VAL	0xffffffff
 
-int interrupt_init(void)
+int timer_init(void)
 {
 	/* start the counter ticking up, reload value on overflow */
 	writel(TIMER_LOAD_VAL, &timer_base->tldr);
diff --git a/cpu/arm_cortexa8/u-boot.lds b/cpu/arm_cortexa8/u-boot.lds
new file mode 100644
index 0000000000..4f1711cca0
--- /dev/null
+++ b/cpu/arm_cortexa8/u-boot.lds
@@ -0,0 +1,58 @@
+/*
+ * January 2004 - Changed to support H4 device
+ * Copyright (c) 2004-2008 Texas Instruments
+ *
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+	. = 0x00000000;
+
+	. = ALIGN(4);
+	.text	:
+	{
+		cpu/arm_cortexa8/start.o	(.text)
+		*(.text)
+	}
+
+	. = ALIGN(4);
+	.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
+
+	. = ALIGN(4);
+	.data : { *(.data) }
+
+	. = ALIGN(4);
+	.got : { *(.got) }
+
+	__u_boot_cmd_start = .;
+	.u_boot_cmd : { *(.u_boot_cmd) }
+	__u_boot_cmd_end = .;
+
+	. = ALIGN(4);
+	__bss_start = .;
+	.bss : { *(.bss) }
+	_end = .;
+}