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authorWolfgang Denk <wd@denx.de>2007-05-17 00:06:11 +0200
committerWolfgang Denk <wd@denx.de>2007-05-17 00:06:11 +0200
commit3a71b5ca775fc9cf506c12d91925019591446c7c (patch)
tree0eb875a5ed89145e1d73ce411b8e2705a53132bd /cpu/microblaze/cache.c
parent3162eb836903c8b247fdc7470dd39bfa6996f495 (diff)
parent70124c2602ae2d4c5d3dba05b482d91548242de8 (diff)
Merge with /home/git/u-boot
Diffstat (limited to 'cpu/microblaze/cache.c')
-rwxr-xr-x[-rw-r--r--]cpu/microblaze/cache.c17
1 files changed, 17 insertions, 0 deletions
diff --git a/cpu/microblaze/cache.c b/cpu/microblaze/cache.c
index fc388ebb56..4f36a84ec4 100644..100755
--- a/cpu/microblaze/cache.c
+++ b/cpu/microblaze/cache.c
@@ -23,6 +23,7 @@
*/
#include <common.h>
+#include <asm/asm.h>
#if (CONFIG_COMMANDS & CFG_CMD_CACHE)
@@ -45,4 +46,20 @@ int icache_status (void)
__asm__ __volatile__ ("and %0,%0,%1"::"r" (i), "r" (mask):"memory");
return i;
}
+
+void icache_enable (void) {
+ MSRSET(0x20);
+}
+
+void icache_disable(void) {
+ MSRCLR(0x20);
+}
+
+void dcache_enable (void) {
+ MSRSET(0x80);
+}
+
+void dcache_disable(void) {
+ MSRCLR(0x80);
+}
#endif