diff options
author | wdenk <wdenk> | 2003-10-15 23:53:47 +0000 |
---|---|---|
committer | wdenk <wdenk> | 2003-10-15 23:53:47 +0000 |
commit | 42d1f0394bef0624fc9664714d54bb137931d6a6 (patch) | |
tree | 892a4130507484d25faf9a72e019cf88cfb3e3d9 /cpu/mpc5xxx/pci_mpc5200.c | |
parent | 2d5b561e2bfdee8552a99b2cf93016cce2a74895 (diff) |
* Patches by Xianghua Xiao, 15 Oct 2003:
- Added Motorola CPU 8540/8560 support (cpu/85xx)
- Added Motorola MPC8540ADS board support (board/mpc8540ads)
- Added Motorola MPC8560ADS board support (board/mpc8560ads)
* Minor code cleanup
Diffstat (limited to 'cpu/mpc5xxx/pci_mpc5200.c')
-rw-r--r-- | cpu/mpc5xxx/pci_mpc5200.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/cpu/mpc5xxx/pci_mpc5200.c b/cpu/mpc5xxx/pci_mpc5200.c index 48f41cfc61..0c2114a818 100644 --- a/cpu/mpc5xxx/pci_mpc5200.c +++ b/cpu/mpc5xxx/pci_mpc5200.c @@ -101,22 +101,22 @@ void pci_mpc5xxx_init (struct pci_controller *hose) /* GPIO Multiplexing - enable PCI */ *(vu_long *)MPC5XXX_GPS_PORT_CONFIG &= ~(1 << 15); - + /* Set host bridge as pci master and enable memory decoding */ *(vu_long *)MPC5XXX_PCI_CMD |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; - + /* Set maximum latency timer */ *(vu_long *)MPC5XXX_PCI_CFG |= (0xf800); /* Set cache line size */ *(vu_long *)MPC5XXX_PCI_CFG = (*(vu_long *)MPC5XXX_PCI_CFG & ~0xff) | (CFG_CACHELINE_SIZE / 4); - + /* Map MBAR to PCI space */ *(vu_long *)MPC5XXX_PCI_BAR0 = CFG_MBAR; *(vu_long *)MPC5XXX_PCI_TBATR1 = CFG_MBAR | 1; - + /* Map RAM to PCI space */ *(vu_long *)MPC5XXX_PCI_BAR1 = CONFIG_PCI_MEMORY_BUS | (1 << 3); *(vu_long *)MPC5XXX_PCI_TBATR1 = CONFIG_PCI_MEMORY_PHYS | 1; @@ -133,14 +133,14 @@ void pci_mpc5xxx_init (struct pci_controller *hose) /* Enable piplining */ *(vu_long *)(MPC5XXX_XLBARB + 0x40) &= ~(1 << 31); #endif - + /* Disable interrupts from PCI controller */ *(vu_long *)MPC5XXX_PCI_GSCR &= ~(7 << 12); *(vu_long *)MPC5XXX_PCI_ICR &= ~(7 << 24); - + /* Disable initiator windows */ *(vu_long *)MPC5XXX_PCI_IWCR = 0; - + /* Map PCI memory to physical space */ *(vu_long *)MPC5XXX_PCI_IW0BTAR = CONFIG_PCI_MEM_PHYS | (((CONFIG_PCI_MEM_SIZE - 1) >> 8) & 0x00ff0000) | @@ -166,7 +166,7 @@ void pci_mpc5xxx_init (struct pci_controller *hose) pci_hose_write_config_byte_via_dword, pci_hose_write_config_word_via_dword, mpc5200_write_config_dword); - + udelay(1000); #ifdef CONFIG_PCI_SCAN_SHOW |