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authorDetlev Zundel <dzu@denx.de>2010-01-20 14:28:48 +0100
committerWolfgang Denk <wd@denx.de>2010-01-25 23:57:39 +0100
commita21fb981d533ac6d323a01c7fa2cda20f2d36de5 (patch)
tree92830d96379035e980bb181f7b74fea91b0e15e4 /cpu/mpc5xxx
parent82826d5422331e9c99e5408dcf0348c8e0c257a6 (diff)
mpc5xxx: Support CPU internal watchdog.
Signed-off-by: Detlev Zundel <dzu@denx.de>
Diffstat (limited to 'cpu/mpc5xxx')
-rw-r--r--cpu/mpc5xxx/cpu.c20
-rw-r--r--cpu/mpc5xxx/cpu_init.c14
2 files changed, 32 insertions, 2 deletions
diff --git a/cpu/mpc5xxx/cpu.c b/cpu/mpc5xxx/cpu.c
index 2a28df4597..edfb8282b7 100644
--- a/cpu/mpc5xxx/cpu.c
+++ b/cpu/mpc5xxx/cpu.c
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2000-2003
+ * (C) Copyright 2000-2010
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
@@ -192,3 +192,21 @@ int cpu_eth_init(bd_t *bis)
return mpc5xxx_fec_initialize(bis);
}
#endif
+
+#if defined(CONFIG_WATCHDOG)
+void watchdog_reset(void)
+{
+ int re_enable = disable_interrupts();
+ reset_5xxx_watchdog();
+ if (re_enable) enable_interrupts();
+}
+
+void reset_5xxx_watchdog(void)
+{
+ volatile struct mpc5xxx_gpt *gpt0 =
+ (struct mpc5xxx_gpt *) MPC5XXX_GPT;
+
+ /* Trigger TIMER_0 by writing A5 to OCPW */
+ clrsetbits_be32(&gpt0->emsr, 0xff000000, 0xa5000000);
+}
+#endif /* CONFIG_WATCHDOG */
diff --git a/cpu/mpc5xxx/cpu_init.c b/cpu/mpc5xxx/cpu_init.c
index acff5f5b35..b15146480b 100644
--- a/cpu/mpc5xxx/cpu_init.c
+++ b/cpu/mpc5xxx/cpu_init.c
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2000-2009
+ * (C) Copyright 2000-2010
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
@@ -24,6 +24,7 @@
#include <common.h>
#include <mpc5xxx.h>
#include <asm/io.h>
+#include <watchdog.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -45,6 +46,8 @@ void cpu_init_f (void)
(struct mpc5xxx_gpio *) MPC5XXX_GPIO;
volatile struct mpc5xxx_xlb *xlb =
(struct mpc5xxx_xlb *) MPC5XXX_XLBARB;
+ volatile struct mpc5xxx_gpt *gpt0 =
+ (struct mpc5xxx_gpt *) MPC5XXX_GPT;
unsigned long addecr = (1 << 25); /* Boot_CS */
#if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_MGT5100)
addecr |= (1 << 22); /* SDRAM enable */
@@ -206,6 +209,15 @@ void cpu_init_f (void)
/* Enable piplining */
clrbits_be32(&xlb->config, (1 << 31));
# endif
+
+#if defined(CONFIG_WATCHDOG)
+ /* Charge the watchdog timer - prescaler = 64k, count = 64k*/
+ out_be32(&gpt0->cir, 0x0000ffff);
+ out_be32(&gpt0->emsr, 0x9004); /* wden|ce|timer_ms */
+
+ reset_5xxx_watchdog();
+#endif /* CONFIG_WATCHDOG */
+
#endif /* CONFIG_MPC5200 */
}