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| author | Dave Liu <daveliu@freescale.com> | 2010-03-05 12:22:00 +0800 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2010-04-07 00:08:06 -0500 |
| commit | 22c9de064a218ae617bfeea35d2164532df91597 (patch) | |
| tree | 6e1584e8e71653185bdc0232568b1e73f976d722 /cpu/mpc85xx/release.S | |
| parent | ec145e87b80f6764d17a6b0aebf521fe758c3fdc (diff) | |
fsl-ddr: change the default burst mode for DDR3
For 64B cacheline SoC, set the fixed 8-beat burst len,
for 32B cacheline SoC, set the On-The-Fly as default.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Diffstat (limited to 'cpu/mpc85xx/release.S')
0 files changed, 0 insertions, 0 deletions