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authorSrikanth Srinivasan <srikanth.srinivasan@freescale.com>2009-01-21 17:17:33 -0600
committerAndy Fleming <afleming@freescale.com>2009-02-16 18:05:55 -0600
commit8d949aff38cfb4388cbd73876e77bcd06d601f20 (patch)
treed5ea3943e341ed81fc4f61cb6176289bda281925 /cpu/mpc85xx
parentcb69e4de8702e108324e1c40363f30ef6f2e2918 (diff)
mpc85xx: Add support for the P2020
Added various p2020 processor specific details: * SVR for p2020, p2020E * immap updates for LAWs and DDR on p2020 * LAW defines related to p2020 Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com> Signed-off-by: Travis Wheatley <Travis.Wheatley@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'cpu/mpc85xx')
-rw-r--r--cpu/mpc85xx/Makefile1
-rw-r--r--cpu/mpc85xx/cpu.c2
2 files changed, 3 insertions, 0 deletions
diff --git a/cpu/mpc85xx/Makefile b/cpu/mpc85xx/Makefile
index 627e61b059..99d88a888d 100644
--- a/cpu/mpc85xx/Makefile
+++ b/cpu/mpc85xx/Makefile
@@ -48,6 +48,7 @@ COBJS-$(CONFIG_MPC8544) += ddr-gen2.o
# supports ddr1/2/3
COBJS-$(CONFIG_MPC8572) += ddr-gen3.o
COBJS-$(CONFIG_MPC8536) += ddr-gen3.o
+COBJS-$(CONFIG_P2020) += ddr-gen3.o
COBJS-$(CONFIG_MPC8536) += mpc8536_serdes.o
COBJS = traps.o cpu.o cpu_init.o speed.o interrupts.o tlb.o \
diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c
index 2ed44bf2ad..c9598fade4 100644
--- a/cpu/mpc85xx/cpu.c
+++ b/cpu/mpc85xx/cpu.c
@@ -62,6 +62,8 @@ struct cpu_type cpu_type_list [] = {
CPU_TYPE_ENTRY(8568, 8568_E),
CPU_TYPE_ENTRY(8572, 8572),
CPU_TYPE_ENTRY(8572, 8572_E),
+ CPU_TYPE_ENTRY(P2020, P2020),
+ CPU_TYPE_ENTRY(P2020, P2020_E),
};
struct cpu_type *identify_cpu(u32 ver)