fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT

The ddr code computes most things as 64-bit quantities and had some places
in the middle that it was using phy_addr_t and phys_size_t.

Instead we use unsigned long long through out and only at the last stage of
setting the LAWs and reporting the amount of memory to the board code do we
truncate down to what we can cover via phys_size_t.

This has the added benefit that the DDR controller itself is always setup
the same way regardless of how much memory we have.  Its only the LAW
setup that limits what is visible to the system.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

1 files changed, 2 insertions, 2 deletions

diff --git a/cpu/mpc8xxx/ddr/ddr3_dimm_params.c b/cpu/mpc8xxx/ddr/ddr3_dimm_params.c
index ca4be78ef3..8d686ac5d9 100644
--- a/cpu/mpc8xxx/ddr/ddr3_dimm_params.c
+++ b/cpu/mpc8xxx/ddr/ddr3_dimm_params.c
@@ -52,10 +52,10 @@
  * 	011		32bits
  *
  */
-static phys_size_t
+static unsigned long long
 compute_ranksize(const ddr3_spd_eeprom_t *spd)
 {
-	phys_size_t bsize;
+	unsigned long long bsize;
 
 	int nbit_sdram_cap_bsize = 0;
 	int nbit_primary_bus_width = 0;