diff options
| author | Rupjyoti Sarmah <rsarmah@appliedmicro.com> | 2010-03-24 16:52:02 +0530 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2010-03-24 14:27:01 +0100 |
| commit | c550afada5fcad426aa6a219a329feb9eedae8b2 (patch) | |
| tree | 99a4b5a26fa904d1852b9662f9643add3ffa806e /cpu/ppc4xx/traps.c | |
| parent | 7027d5622d56ee2292713773044fb6352e431f31 (diff) | |
ppc4xx fix unstable 440EPx bootstrap options
440EPx fixed bootstrap options A, B, D, and E sets PLL FWDVA to a value = 1.
This results in the PLLOUTB being greater than the CPU clock frequency
resulting unstable 440EPx operation resulting in various software hang
conditions.
This patch reprograms the FWDVA satisfying the requirement of setting FWDVB
to a value greater than 1 while using one of the four deafult bootstrap options.
Signed-off-by: Rupjyoti Sarmah <rsarmah@amcc.com>
Acked-by : Victor Gallardo <vgallardo@appliedmicro.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'cpu/ppc4xx/traps.c')
0 files changed, 0 insertions, 0 deletions