Cleanup (PPC4xx is AMCC now)

5 files changed, 7 insertions, 7 deletions

diff --git a/cpu/ppc4xx/4xx_enet.c b/cpu/ppc4xx/4xx_enet.c
index 79be865345..4809026134 100644
--- a/cpu/ppc4xx/4xx_enet.c
+++ b/cpu/ppc4xx/4xx_enet.c
@@ -90,7 +90,7 @@
 #include "vecnum.h"
 
 /*
- * Only compile for platform with IBM/AMCC EMAC ethernet controller and
+ * Only compile for platform with AMCC EMAC ethernet controller and
  * network support enabled.
  * Remark: CONFIG_405 describes Xilinx PPC405 FPGA without EMAC controller!
  */
diff --git a/cpu/ppc4xx/bedbug_405.c b/cpu/ppc4xx/bedbug_405.c
index 23752f3940..a3c2119764 100644
--- a/cpu/ppc4xx/bedbug_405.c
+++ b/cpu/ppc4xx/bedbug_405.c
@@ -25,7 +25,7 @@ int bedbug405_clear __P ((int));
 
 
 /* ======================================================================
- * Initialize the global bug_ctx structure for the IBM PPC405.	Clear all
+ * Initialize the global bug_ctx structure for the AMCC PPC405.	Clear all
  * of the breakpoints.
  * ====================================================================== */
 
diff --git a/cpu/ppc4xx/serial.c b/cpu/ppc4xx/serial.c
index 8cf7dab3a2..e06fb0d44b 100644
--- a/cpu/ppc4xx/serial.c
+++ b/cpu/ppc4xx/serial.c
@@ -320,7 +320,7 @@ int serial_tstc ()
 #endif
 
 #if defined(CONFIG_405EP) && defined(CFG_EXT_SERIAL_CLOCK)
-#error "External serial clock not supported on IBM PPC405EP!"
+#error "External serial clock not supported on AMCC PPC405EP!"
 #endif
 
 #define UART_RBR    0x00
diff --git a/cpu/ppc4xx/spd_sdram.c b/cpu/ppc4xx/spd_sdram.c
index 3b7125dc57..48102efcff 100644
--- a/cpu/ppc4xx/spd_sdram.c
+++ b/cpu/ppc4xx/spd_sdram.c
@@ -14,7 +14,7 @@
  *
  * (C) Copyright 2002
  * Jun Gu, Artesyn Technology, jung@artesyncp.com
- * Support for IBM 440 based on OpenBIOS draminit.c from IBM.
+ * Support for AMCC 440 based on OpenBIOS draminit.c from IBM.
  *
  * (C) Copyright 2005
  * Stefan Roese, DENX Software Engineering, sr@denx.de.
@@ -108,7 +108,7 @@ int spd_read(uint addr);
  * This function is reading data from the DIMM module EEPROM over the SPD bus
  * and uses that to program the sdram controller.
  *
- * This works on boards that has the same schematics that the IBM walnut has.
+ * This works on boards that has the same schematics that the AMCC walnut has.
  *
  * Input: null for default I2C spd functions or a pointer to a custom function
  * returning spd_data.
@@ -696,7 +696,7 @@ long  program_bxcr(unsigned long* dimm_populated,
  * This function is reading data from the DIMM module EEPROM over the SPD bus
  * and uses that to program the sdram controller.
  *
- * This works on boards that has the same schematics that the IBM walnut has.
+ * This works on boards that has the same schematics that the AMCC walnut has.
  *
  * BUG: Don't handle ECC memory
  * BUG: A few values in the TR register is currently hardcoded
diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S
index 003c5b6bf1..f434e207d9 100644
--- a/cpu/ppc4xx/start.S
+++ b/cpu/ppc4xx/start.S
@@ -42,7 +42,7 @@
 /*	 LICENSED MATERIAL  -  PROGRAM PROPERTY OF I B M */
 /*------------------------------------------------------------------------------- */
 
-/*  U-Boot - Startup Code for IBM 4xx PowerPC based Embedded Boards
+/*  U-Boot - Startup Code for AMCC 4xx PowerPC based Embedded Boards
  *
  *
  *  The processor starts at 0xfffffffc and the code is executed