diff options
| author | Detlev Zundel <dzu@denx.de> | 2008-06-30 15:35:34 +0200 |
|---|---|---|
| committer | Detlev Zundel <dzu@denx.de> | 2008-06-30 15:38:24 +0200 |
| commit | a524e112b424c6843800ea2f19d3a8cf01d0aa94 (patch) | |
| tree | 9bb267b7324e95dd56945f9f16f822a434d34024 /cpu | |
| parent | 40777812316fc252c941665c0f60c148fd79d50f (diff) | |
| parent | 745d8a0d3cea82e6d1753e14afb4588c34761b15 (diff) | |
Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx
Diffstat (limited to 'cpu')
| -rw-r--r-- | cpu/ppc4xx/cpu_init.c | 20 | ||||
| -rw-r--r-- | cpu/ppc4xx/gpio.c | 4 |
2 files changed, 20 insertions, 4 deletions
diff --git a/cpu/ppc4xx/cpu_init.c b/cpu/ppc4xx/cpu_init.c index 1e9423a89b..ac64279051 100644 --- a/cpu/ppc4xx/cpu_init.c +++ b/cpu/ppc4xx/cpu_init.c @@ -138,8 +138,8 @@ void reconfigure_pll(u32 new_cpu_freq) void cpu_init_f (void) { -#if defined(CONFIG_WATCHDOG) - unsigned long val; +#if defined(CONFIG_WATCHDOG) || defined(CONFIG_460EX) + u32 val; #endif reconfigure_pll(CFG_PLL_RECONFIG); @@ -272,6 +272,22 @@ cpu_init_f (void) reset_4xx_watchdog(); #endif /* CONFIG_WATCHDOG */ + +#if defined(CONFIG_460EX) + /* + * Set SDR0_AHB_CFG[A2P_INCR4] (bit 24) and + * clear SDR0_AHB_CFG[A2P_PROT2] (bit 25) for a new 460EX errata + * regarding concurrent use of AHB USB OTG, USB 2.0 host and SATA + */ + mfsdr(SDR0_AHB_CFG, val); + val |= 0x80; + val &= ~0x40; + mtsdr(SDR0_AHB_CFG, val); + mfsdr(SDR0_USB2HOST_CFG, val); + val &= ~0xf00; + val |= 0x400; + mtsdr(SDR0_USB2HOST_CFG, val); +#endif /* CONFIG_460EX */ } /* diff --git a/cpu/ppc4xx/gpio.c b/cpu/ppc4xx/gpio.c index 37d3fa8ef7..df99f5314b 100644 --- a/cpu/ppc4xx/gpio.c +++ b/cpu/ppc4xx/gpio.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2007 + * (C) Copyright 2007-2008 * Stefan Roese, DENX Software Engineering, sr@denx.de. * * See file CREDITS for list of people who contributed to this @@ -52,7 +52,7 @@ void gpio_config(int pin, int in_out, int gpio_alt, int out_val) } mask = 0x80000000 >> pin; - mask2 = 0xc0000000 >> (pin2 << 1); + mask2 = 0xc0000000 >> pin2; /* first set TCR to 0 */ out_be32((void *)GPIO0_TCR + offs, in_be32((void *)GPIO0_TCR + offs) & ~mask); |