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| author | Tom Rini <trini@konsulko.com> | 2019-07-24 13:15:19 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-07-24 13:15:19 -0400 |
| commit | ef783259d6a558d31385039fa0def211fa7ad032 (patch) | |
| tree | d2774a64f3551c31a55cc1efeaa3844f069af1d8 /doc/README.AX25 | |
| parent | fe4243870df152f839f88e5aa355f53cfba0a866 (diff) | |
| parent | 0694dd86756ac1b4986cc40f15a5b7b35745ac38 (diff) | |
Merge branch '2019-07-24-doc-html-cleanup'
- Convert our docs to Sphinx
Diffstat (limited to 'doc/README.AX25')
| -rw-r--r-- | doc/README.AX25 | 46 |
1 files changed, 0 insertions, 46 deletions
diff --git a/doc/README.AX25 b/doc/README.AX25 deleted file mode 100644 index 7a607dd1f8..0000000000 --- a/doc/README.AX25 +++ /dev/null @@ -1,46 +0,0 @@ -AX25 is Andes CPU IP to adopt RISC-V architecture. - -Features -======== - -CPU Core - - 5-stage in-order execution pipeline - - Hardware Multiplier - - radix-2/radix-4/radix-16/radix-256/fast - - Hardware Divider - - Optional branch prediction - - Machine mode and optional user mode - - Optional performance monitoring - -ISA - - RV64I base integer instructions - - RVC for 16-bit compressed instructions - - RVM for multiplication and division instructions - -Memory subsystem - - I & D local memory - - Size: 4KB to 16MB - - Memory subsyetem soft-error protection - - Protection scheme: parity-checking or error-checking-and-correction (ECC) - - Automatic hardware error correction - -Bus - - Interface Protocol - - Synchronous AHB (32-bit/64-bit data-width), or - - Synchronous AXI4 (64-bit data-width) - -Power management - - Wait for interrupt (WFI) mode - -Debug - - Configurable number of breakpoints: 2/4/8 - - External Debug Module - - AHB slave port - - External JTAG debug transport module - -Platform Level Interrupt Controller (PLIC) - - AHB slave port - - Configurable number of interrupts: 1-1023 - - Configurable number of interrupt priorities: 3/7/15/63/127/255 - - Configurable number of targets: 1-16 - - Preempted interrupt priority stack |