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author | Adrian Filipi <adrian.filipi@eurotech.com> | 2008-05-06 16:46:37 -0400 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-05-09 20:53:52 +0200 |
commit | 8fbc985bdad09b23b7eb4df1d2ea589619d8db4c (patch) | |
tree | 3409b8b65e62286a82db9cecbeda6f5f08eacd84 /doc/README.nand-boot-ppc440 | |
parent | e419e12d04ae3b280c99a87a2ea4ad7a40628bcb (diff) |
Fix some typos
This patch fixes three typos.
The first is a repetition of CONFIG_CMD_BSP.
The second makes the #endif comment match its #if.
The third is a spelling error.
Signed-off-by: Adrian Filipi <adrian.filipi@eurotech.com>
Diffstat (limited to 'doc/README.nand-boot-ppc440')
-rw-r--r-- | doc/README.nand-boot-ppc440 | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/doc/README.nand-boot-ppc440 b/doc/README.nand-boot-ppc440 index a1c1d8c444..1e9c102644 100644 --- a/doc/README.nand-boot-ppc440 +++ b/doc/README.nand-boot-ppc440 @@ -9,7 +9,7 @@ The PPC440EP(x)/GR(x) cpu's can boot directly from NAND FLASH, completely without NOR FLASH. This can be done by using the NAND boot feature of the 440 NAND flash controller (NDFC). -Here a short desciption of the different boot stages: +Here a short description of the different boot stages: a) IPL (Initial Program Loader, integrated inside CPU) ------------------------------------------------------ |